diff options
| author | Kenneth Graunke <[email protected]> | 2013-02-06 23:26:36 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2013-03-14 12:30:40 -0700 |
| commit | 91df4d746bd50b328b9f4b55126c95c046087a4d (patch) | |
| tree | 8af6ee6d1cb076ff04266fb55ee944802fdf8807 /src/mesa | |
| parent | 125b34cffbd377a3b27967b37767692796542250 (diff) | |
i965: Make INTEL_DEBUG=shader_time use the RAW surface format.
Untyped Atomic Operation messages are illegal for non-RAW formats. The
IVB hardware proceeds happily (after all, who cares what the format of the
surface is if you're doing untyped ops on it?), but later hardware
apparently doesn't. The simulator for gen7 does complain, though.
v2: Rebase against updates to previous patches. (by anholt)
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Paul Berry <[email protected]>
Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 1 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 5 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index ac86ed46cf9..b45e4a49b41 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -437,6 +437,7 @@ #define BRW_SURFACEFORMAT_B10G10R10A2_SSCALED 0x1B9 #define BRW_SURFACEFORMAT_B10G10R10A2_UINT 0x1BA #define BRW_SURFACEFORMAT_B10G10R10A2_SINT 0x1BB +#define BRW_SURFACEFORMAT_RAW 0x1FF #define BRW_SURFACE_FORMAT_SHIFT 18 #define BRW_SURFACE_FORMAT_MASK INTEL_MASK(26, 18) diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 034be82a6cc..db04253af9c 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -438,15 +438,14 @@ gen7_create_shader_time_surface(struct brw_context *brw, uint32_t *out_offset) memset(surf, 0, 8 * 4); surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT | - BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_SURFACE_FORMAT_SHIFT | + BRW_SURFACEFORMAT_RAW << BRW_SURFACE_FORMAT_SHIFT | BRW_SURFACE_RC_READ_WRITE; surf[1] = brw->shader_time.bo->offset; /* reloc */ surf[2] = SET_FIELD(w & 0x7f, GEN7_SURFACE_WIDTH) | SET_FIELD((w >> 7) & 0x1fff, GEN7_SURFACE_HEIGHT); - surf[3] = SET_FIELD((w >> 20) & 0x7f, BRW_SURFACE_DEPTH) | - (16 - 1); /* stride between samples */ + surf[3] = SET_FIELD((w >> 20) & 0x7f, BRW_SURFACE_DEPTH); /* Unlike texture or renderbuffer surfaces, we only do untyped operations * on the shader_time surface, so there's no need to set HSW channel |