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authorKenneth Graunke <[email protected]>2014-04-21 19:43:50 -0700
committerKenneth Graunke <[email protected]>2014-11-03 15:33:05 -0800
commit77f584c7f98d981927d3a2ea4639ac9d7afbef01 (patch)
treecc1a08b2fba9b8ae74f44e662f61d1c02760bd23 /src/mesa
parent0bb072b42bb8a2a7e8043557d949f1bd25842912 (diff)
i965/skl: Emit extra zeros in 3DSTATE_DS on Skylake.
Skylake's 3DSTATE_DS packet has a few more fields; we don't support domain shaders yet though. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/gen8_disable.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_disable.c b/src/mesa/drivers/dri/i965/gen8_disable.c
index 276bd2e55fd..0839a4999a2 100644
--- a/src/mesa/drivers/dri/i965/gen8_disable.c
+++ b/src/mesa/drivers/dri/i965/gen8_disable.c
@@ -92,16 +92,11 @@ disable_stages(struct brw_context *brw)
OUT_BATCH(0);
ADVANCE_BATCH();
- BEGIN_BATCH(9);
- OUT_BATCH(_3DSTATE_DS << 16 | (9 - 2));
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
+ int ds_pkt_len = brw->gen >= 9 ? 11 : 9;
+ BEGIN_BATCH(ds_pkt_len);
+ OUT_BATCH(_3DSTATE_DS << 16 | (ds_pkt_len - 2));
+ for (int i = 0; i < ds_pkt_len - 1; i++)
+ OUT_BATCH(0);
ADVANCE_BATCH();
BEGIN_BATCH(2);