diff options
author | Chad Versace <[email protected]> | 2011-11-16 16:02:39 -0800 |
---|---|---|
committer | Chad Versace <[email protected]> | 2011-11-21 16:58:29 -0800 |
commit | 190aec75a4362b56b9b311975a777c56e8e6c67d (patch) | |
tree | 9a622a6a98321da9d9783856dbeb8918b5674652 /src/mesa | |
parent | af35a3523df7f555427de4835ae092d1836c3c95 (diff) |
intel: Always gather stencil buffer in intel_map_renderbuffer_separate_s8z24()
The function gathered the stencil buffer into the depth buffer only when
the map mode contained the read bit. But we must do the gather even if the
map mode is write-only. If we do not, then, when the depth buffer's stencil
bits are scattered into the stencil buffer by intel_unmap_renderbuffer(),
some of the scattered stencil bits would be invalid.
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Signed-off-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_fbo.c | 52 |
1 files changed, 20 insertions, 32 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index a724f1d97b3..1bd16f06a38 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -321,11 +321,12 @@ intel_map_renderbuffer_separate_s8z24(struct gl_context *ctx, struct intel_context *intel = intel_context(ctx); struct intel_renderbuffer *irb = intel_renderbuffer(rb); - GLbitfield adjusted_mode; - uint8_t *s8z24_map; int32_t s8z24_stride; + struct intel_renderbuffer *s8_irb; + uint8_t *s8_map; + assert(rb->Name != 0); assert(rb->Format == MESA_FORMAT_S8_Z24); assert(irb->wrapped_depth != NULL); @@ -337,42 +338,29 @@ intel_map_renderbuffer_separate_s8z24(struct gl_context *ctx, irb->map_w = w; irb->map_h = h; - if (mode & GL_MAP_READ_BIT) { - /* Since the caller may read the stencil bits, we must copy the stencil - * buffer's contents into the depth buffer. This necessitates that the - * depth buffer be mapped in write mode. - */ - adjusted_mode = mode | GL_MAP_WRITE_BIT; - } else { - adjusted_mode = mode; - } - + /* Map with write mode for the gather below. */ intel_map_renderbuffer_gtt(ctx, irb->wrapped_depth, - x, y, w, h, adjusted_mode, + x, y, w, h, mode | GL_MAP_WRITE_BIT, &s8z24_map, &s8z24_stride); - if (mode & GL_MAP_READ_BIT) { - struct intel_renderbuffer *s8_irb; - uint8_t *s8_map; - - s8_irb = intel_renderbuffer(irb->wrapped_stencil); - s8_map = intel_region_map(intel, s8_irb->region, GL_MAP_READ_BIT); - - for (uint32_t pix_y = 0; pix_y < h; ++pix_y) { - for (uint32_t pix_x = 0; pix_x < w; ++pix_x) { - ptrdiff_t s8_offset = intel_offset_S8(s8_irb->region->pitch, - x + pix_x, - y + pix_y); - ptrdiff_t s8z24_offset = pix_y * s8z24_stride - + pix_x * 4 - + 3; - s8z24_map[s8z24_offset] = s8_map[s8_offset]; - } + s8_irb = intel_renderbuffer(irb->wrapped_stencil); + s8_map = intel_region_map(intel, s8_irb->region, GL_MAP_READ_BIT); + + /* Gather the stencil buffer into the depth buffer. */ + for (uint32_t pix_y = 0; pix_y < h; ++pix_y) { + for (uint32_t pix_x = 0; pix_x < w; ++pix_x) { + ptrdiff_t s8_offset = intel_offset_S8(s8_irb->region->pitch, + x + pix_x, + y + pix_y); + ptrdiff_t s8z24_offset = pix_y * s8z24_stride + + pix_x * 4 + + 3; + s8z24_map[s8z24_offset] = s8_map[s8_offset]; } - - intel_region_unmap(intel, s8_irb->region); } + intel_region_unmap(intel, s8_irb->region); + *out_map = s8z24_map; *out_stride = s8z24_stride; } |