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authorJason Ekstrand <[email protected]>2017-08-02 10:37:36 -0700
committerJason Ekstrand <[email protected]>2017-08-07 09:31:11 -0700
commit0e4d9a4b371f33646ef0779d811ac91ab676ea27 (patch)
treec5aa1cd9f6915f23c7134240b1255a37ef8f05f2 /src/mesa
parent4d27c6095e8385cccd225993452baad4d2e35420 (diff)
i965/miptree Remove layout_flags parameter form is_mcs_supported
The one caller of is_mcs_supported passes 0 in as the layout_flags unconditionally. Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 858279fcba7..0891d02c0b8 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -59,8 +59,7 @@ intel_miptree_alloc_aux(struct brw_context *brw,
struct intel_mipmap_tree *mt);
static bool
-is_mcs_supported(const struct brw_context *brw, mesa_format format,
- uint32_t layout_flags)
+is_mcs_supported(const struct brw_context *brw, mesa_format format)
{
/* Prior to Gen7, all MSAA surfaces used IMS layout. */
if (brw->gen < 7)
@@ -86,11 +85,6 @@ is_mcs_supported(const struct brw_context *brw, mesa_format format,
*/
if (brw->gen == 7 && _mesa_get_format_datatype(format) == GL_INT) {
return false;
- } else if (layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) {
- /* We can't use the CMS layout because it uses an aux buffer, the MCS
- * buffer. So fallback to UMS, which is identical to CMS without the
- * MCS. */
- return false;
} else {
return true;
}
@@ -329,8 +323,7 @@ intel_miptree_choose_aux_usage(struct brw_context *brw,
{
assert(mt->aux_usage == ISL_AUX_USAGE_NONE);
- const unsigned no_flags = 0;
- if (mt->surf.samples > 1 && is_mcs_supported(brw, mt->format, no_flags)) {
+ if (mt->surf.samples > 1 && is_mcs_supported(brw, mt->format)) {
assert(mt->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY);
mt->aux_usage = ISL_AUX_USAGE_MCS;
} else if (intel_tiling_supports_ccs(brw, mt->surf.tiling) &&