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authorChad Versace <[email protected]>2012-06-21 11:35:03 -0700
committerChad Versace <[email protected]>2012-06-25 15:56:40 -0700
commitcf0bbb30f6bd9d3fa61b5207320e8f34c563a2c6 (patch)
treea1fcc86fa303d56be342a614a3501f4b95be287a /src/mesa
parent345ee593e91e14173cbc08a647b008855b7638ca (diff)
i965/fs: Fix conversions float->bool, int->bool
Fixes gles2conform GL.equal.equal_bvec2_frag. This fixes brw_fs_visitor's translation of ir_unop_f2b. It used CMP to convert the float to one of 0 or ~0. However, the convention in the compiler is that true is represented by 1, not ~0. This patch adds an AND to convert ~0 to 1. By inspection, a similar problem existed with ir_unop_i2b, with a similar fix. [v2 kayden]: eliminate extra temporary register. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49621 Signed-off-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_visitor.cpp14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 4b9330bed94..9bd1e67119d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -477,16 +477,16 @@ fs_visitor::visit(ir_expression *ir)
break;
case ir_unop_f2b:
+ inst = emit(BRW_OPCODE_CMP, this->result, op[0], fs_reg(0.0f));
+ inst->conditional_mod = BRW_CONDITIONAL_NZ;
+ emit(BRW_OPCODE_AND, this->result, this->result, fs_reg(1));
+ break;
case ir_unop_i2b:
- temp = this->result;
- /* original gen4 does implicit conversion before comparison. */
- if (intel->gen < 5)
- temp.type = op[0].type;
-
- resolve_ud_negate(&op[0]);
+ assert(op[0].type == BRW_REGISTER_TYPE_D);
- inst = emit(BRW_OPCODE_CMP, temp, op[0], fs_reg(0.0f));
+ inst = emit(BRW_OPCODE_CMP, this->result, op[0], fs_reg(0));
inst->conditional_mod = BRW_CONDITIONAL_NZ;
+ emit(BRW_OPCODE_AND, this->result, this->result, fs_reg(1));
break;
case ir_unop_trunc: