intel: Replace intel_mipmap_tree::hiz_region with a miptree [v2]

This is required to correctly implement HiZ for mipmapped and
multi-layered textures.

v2: Accomodate refcount fixes in intel_process_dri2_buffer_*() that were
    introduced in v2 of commit
        intel: Replace intel_renderbuffer::region with a miptree [v2]

Reviewed-by: Eric Anholt <eric@anholt>
Signed-off-by: Chad Versace <[email protected]>

5 files changed, 50 insertions, 30 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 4119afa4c49..17da46099ed 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -209,8 +209,9 @@ static void emit_depthbuffer(struct brw_context *brw)
    unsigned int len;
 
    if (depth_irb &&
-       depth_irb->mt) {
-      hiz_region = depth_irb->mt->hiz_region;
+       depth_irb->mt &&
+       depth_irb->mt->hiz_mt) {
+      hiz_region = depth_irb->mt->hiz_mt->region;
    }
 
    /* 3DSTATE_DEPTH_BUFFER, 3DSTATE_STENCIL_BUFFER are both
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 3f55c512357..9af21c8dace 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -1357,8 +1357,8 @@ intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
 	rb->mt->region->name == buffer->name) ||
        (buffer->attachment == __DRI_BUFFER_HIZ &&
 	rb->mt &&
-	rb->mt->hiz_region &&
-	rb->mt->hiz_region->name == buffer->name)) {
+	rb->mt->hiz_mt &&
+	rb->mt->hiz_mt->region->name == buffer->name)) {
       return;
    }
 
@@ -1388,10 +1388,10 @@ intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
    }
 
    /* Release the buffer storage now in case we have to return early
-    * due to region allocation failure.
+    * due to failure to allocate new storage.
     */
    if (buffer->attachment == __DRI_BUFFER_HIZ) {
-      intel_region_release(&rb->mt->hiz_region);
+      intel_miptree_release(&rb->mt->hiz_mt);
    } else {
       intel_miptree_release(&rb->mt);
    }
@@ -1407,15 +1407,18 @@ intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
    if (!region)
       return;
 
+   struct intel_mipmap_tree *mt =
+      intel_miptree_create_for_region(intel,
+				      GL_TEXTURE_2D,
+				      rb->Base.Format,
+				      region);
+   intel_region_release(&region);
+
    /* Associate buffer with new storage. */
    if (buffer->attachment == __DRI_BUFFER_HIZ) {
-      rb->mt->hiz_region = region;
+      rb->mt->hiz_mt = mt;
    } else {
-      rb->mt = intel_miptree_create_for_region(intel,
-                                               GL_TEXTURE_2D,
-                                               rb->Base.Format,
-                                               region);
-      intel_region_release(&region);
+      rb->mt = mt;
    }
 }
 
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 9aa0f98501a..94f74e00c5e 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -63,7 +63,7 @@ intel_framebuffer_has_hiz(struct gl_framebuffer *fb)
    struct intel_renderbuffer *rb = NULL;
    if (fb)
       rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
-   return rb && rb->mt && rb->mt->hiz_region;
+   return rb && rb->mt && rb->mt->hiz_mt;
 }
 
 struct intel_region*
@@ -705,13 +705,8 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
 	 return false;
 
       if (intel->vtbl.is_hiz_depth_format(intel, rb->Format)) {
-	 irb->mt->hiz_region = intel_region_alloc(intel->intelScreen,
-	                                          I915_TILING_Y,
-	                                          cpp,
-	                                          rb->Width,
-	                                          rb->Height,
-	                                          true);
-	 if (!irb->mt->hiz_region) {
+	 bool ok = intel_miptree_alloc_hiz(intel, irb->mt);
+	 if (!ok) {
 	    intel_miptree_release(&irb->mt);
 	    return false;
 	 }
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index b55e16a4554..900b260cdf9 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -261,8 +261,8 @@ intel_miptree_release(struct intel_mipmap_tree **mt)
       DBG("%s deleting %p\n", __FUNCTION__, *mt);
 
       intel_region_release(&((*mt)->region));
-      intel_region_release(&((*mt)->hiz_region));
       intel_miptree_release(&(*mt)->stencil_mt);
+      intel_miptree_release(&(*mt)->hiz_mt);
 
       for (i = 0; i < MAX_TEXTURE_LEVELS; i++) {
 	 free((*mt)->level[i].slice);
@@ -578,3 +578,20 @@ intel_miptree_s8z24_gather(struct intel_context *intel,
 {
    intel_miptree_s8z24_scattergather(intel, mt, level, layer, false);
 }
+
+bool
+intel_miptree_alloc_hiz(struct intel_context *intel,
+			struct intel_mipmap_tree *mt)
+{
+   assert(mt->hiz_mt == NULL);
+   mt->hiz_mt = intel_miptree_create(intel,
+                                     mt->target,
+                                     MESA_FORMAT_X8_Z24,
+                                     mt->first_level,
+                                     mt->last_level,
+                                     mt->width0,
+                                     mt->height0,
+                                     mt->depth0,
+                                     true);
+   return mt->hiz_mt != NULL;
+}
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index f22e6852197..2b20d061412 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -139,18 +139,13 @@ struct intel_mipmap_tree
    struct intel_region *region;
 
    /**
-    * This points to an auxillary hiz region if all of the following hold:
-    *     1. The texture has been attached to an FBO as a depthbuffer.
-    *     2. The texture format is hiz compatible.
-    *     3. The intel context supports hiz.
+    * \brief HiZ miptree
     *
-    * When a texture is attached to multiple FBO's, a separate renderbuffer
-    * wrapper is created for each attachment. This necessitates storing the
-    * hiz region in the texture itself instead of the renderbuffer wrapper.
+    * This is non-null only if HiZ is enabled for this miptree.
     *
-    * \see intel_fbo.c:intel_wrap_texture()
+    * \see intel_miptree_alloc_hiz()
     */
-   struct intel_region *hiz_region;
+   struct intel_mipmap_tree *hiz_mt;
 
    /**
     * \brief Stencil miptree for depthstencil textures.
@@ -276,6 +271,15 @@ intel_miptree_s8z24_gather(struct intel_context *intel,
                            uint32_t level,
                            uint32_t layer);
 
+/**
+ * \brief Allocate the miptree's embedded HiZ miptree.
+ * \see intel_mipmap_tree:hiz_mt
+ * \return false if allocation failed
+ */
+bool
+intel_miptree_alloc_hiz(struct intel_context *intel,
+			struct intel_mipmap_tree *mt);
+
 /* i915_mipmap_tree.c:
  */
 void i915_miptree_layout(struct intel_mipmap_tree *mt);