diff options
author | Kenneth Graunke <kenneth@whitecape.org> | 2018-05-31 16:39:16 -0700 |
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committer | Kenneth Graunke <kenneth@whitecape.org> | 2018-06-06 19:45:09 -0700 |
commit | 74259b98aab010d3062c5903770dc3067665b59e (patch) | |
tree | 9229583cc2b30b8b7d4a05286e05f2c613f7467e /src/mesa | |
parent | 2a74296f24ba15b14602286a680ca5f344a71059 (diff) |
intel/blorp: Emit VF cache invalidates for 48-bit bugs with softpin.
commit 92f01fc5f914fd500497d0c3aed75f3ac8dc054d made i965 start emitting
VF cache invalidates when the high bits of vertex buffers change. But
we were not tracking vertex buffers emitted by BLORP. This was papered
over by a mistake where I emitted VF cache invalidates all the time,
which Chris fixed in commit 3ac5fbadfd8644d30fce9ff267cb811ad157996a.
This patch adds a new hook which allows the driver to track addresses
and request a VF cache invalidate as appropriate.
v2: Make the driver do the PIPE_CONTROL so it can apply workarounds
(caught by Jason Ekstrand). Rebase on anv bug fix.
v3: Don't screw up the boolean (caught by Jason Ekstrand).
Fixes: 92f01fc5f914 ("i965: Emit VF cache invalidates for 48-bit addressing bugs with softpin.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/genX_blorp_exec.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c index 808bff0db85..34bfcad03eb 100644 --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c +++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c @@ -189,6 +189,35 @@ blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size, return data; } +/** + * See vf_invalidate_for_vb_48b_transitions in genX_state_upload.c. + */ +static void +blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch, + const struct blorp_address *addrs, + unsigned num_vbs) +{ +#if GEN_GEN >= 8 + struct brw_context *brw = batch->driver_batch; + bool need_invalidate = false; + + for (unsigned i = 0; i < num_vbs; i++) { + struct brw_bo *bo = addrs[i].buffer; + uint16_t high_bits = + bo && (bo->kflags & EXEC_OBJECT_PINNED) ? bo->gtt_offset >> 32u : 0; + + if (high_bits != brw->vb.last_bo_high_bits[i]) { + need_invalidate = true; + brw->vb.last_bo_high_bits[i] = high_bits; + } + } + + if (need_invalidate) { + brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE); + } +#endif +} + #if GEN_GEN >= 8 static struct blorp_address blorp_get_workaround_page(struct blorp_batch *batch) |