diff options
author | Kevin Rogovin <[email protected]> | 2018-08-27 09:54:24 +0300 |
---|---|---|
committer | Plamena Manolova <[email protected]> | 2018-08-28 17:15:10 +0300 |
commit | 03ecec9ed2099f6e2b62994b33dc948dc731e7b8 (patch) | |
tree | 69549844e81bb93aee07e3cfc2195c68b2d3c62c /src/mesa | |
parent | 119435c8778dd26cb7c8bcde9f04b3982239fe60 (diff) |
i965: Add INTEL_fragment_shader_ordering support.
Adds suppport for INTEL_fragment_shader_ordering. We achieve
the fragment ordering by using the same instruction as for
beginInvocationInterlockARB() which is by issuing a memory
fence via sendc.
Signed-off-by: Kevin Rogovin <[email protected]>
Reviewed-by: Plamena Manolova <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_extensions.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 0b137664b0d..1ea8594c348 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -247,6 +247,7 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.OES_primitive_bounding_box = true; ctx->Extensions.OES_texture_buffer = true; ctx->Extensions.ARB_fragment_shader_interlock = true; + ctx->Extensions.INTEL_fragment_shader_ordering = true; if (can_do_pipelined_register_writes(brw->screen)) { ctx->Extensions.ARB_draw_indirect = true; |