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authorKenneth Graunke <[email protected]>2014-06-13 15:25:14 -0700
committerKenneth Graunke <[email protected]>2014-06-16 17:22:29 -0700
commitfa35b272a04f1c0c598f1ba67f6e27fac96efa01 (patch)
tree6ddfe4e062fc75abbe02089b08c7735469e778b1 /src/mesa
parent380dd3be0256f2fb56d4722a0a894c3cba2b728b (diff)
i965: Make INTEL_DEBUG=mip print out whether HiZ is enabled.
We only enable HiZ for miplevels which are aligned on 8x4 blocks. When debugging HiZ failures, it's useful to know whether a particular miplevel is using HiZ or not. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index a0e637a9095..4c71e41188d 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1370,10 +1370,12 @@ intel_miptree_level_enable_hiz(struct brw_context *brw,
* force the proper size alignments.
*/
if (level > 0 && ((width & 7) || (height & 3))) {
+ DBG("mt %p level %d: HiZ DISABLED\n", mt, level);
return false;
}
}
+ DBG("mt %p level %d: HiZ enabled\n", mt, level);
mt->level[level].has_hiz = true;
return true;
}