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authorIago Toral Quiroga <[email protected]>2017-09-15 09:06:11 +0200
committerIago Toral Quiroga <[email protected]>2017-09-18 10:47:51 +0200
commit9a8bf42308f437c3895a5bc82024de33713d3cb6 (patch)
tree259c20c71388aa92e4c492ef00cc8f3fc8983c6f /src/mesa
parentca65b9e62d2928c2b96502a8762b84e4e8ecd699 (diff)
i965: emit BRW_NEW_AUX_STATE when we change the fast clear value
v2: rename intel_miptree_set_clear_value to intel_miptree_set_clear_color (Jason) Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.c12
-rw-r--r--src/mesa/drivers/dri/i965/brw_clear.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.h28
3 files changed, 31 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index d89b3ee4f08..835dbd2af36 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -853,8 +853,8 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
brw_meta_convert_fast_clear_color(brw, irb->mt,
&ctx->Color.ClearColor);
- bool same_clear_color = memcmp(&irb->mt->fast_clear_color,
- &clear_color, sizeof(clear_color)) == 0;
+ bool same_clear_color =
+ !intel_miptree_set_clear_color(ctx, irb->mt, clear_color);
/* If the buffer is already in INTEL_FAST_CLEAR_STATE_CLEAR, the clear
* is redundant and can be skipped.
@@ -862,14 +862,6 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
if (aux_state == ISL_AUX_STATE_CLEAR && same_clear_color)
return;
- irb->mt->fast_clear_color = clear_color;
-
- /* If the clear color has changed, we need to emit a new SURFACE_STATE
- * on the next draw call.
- */
- if (!same_clear_color)
- ctx->NewDriverState |= BRW_NEW_AUX_STATE;
-
DBG("%s (fast) to mt %p level %d layers %d+%d\n", __FUNCTION__,
irb->mt, irb->mt_level, irb->mt_layer, num_layers);
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
index b9e087ce33b..fe8634b3b34 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -212,7 +212,7 @@ brw_fast_clear_depth(struct gl_context *ctx)
}
}
- mt->fast_clear_color.f32[0] = clear_value;
+ intel_miptree_set_depth_clear_value(ctx, mt, clear_value);
}
bool need_clear = false;
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index e2b23c5aadd..2fce28c524b 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -50,6 +50,7 @@
#include "isl/isl.h"
#include "blorp/blorp.h"
#include "brw_bufmgr.h"
+#include "brw_context.h"
#include <GL/internal/dri_interface.h>
#ifdef __cplusplus
@@ -710,6 +711,33 @@ bool
intel_miptree_sample_with_hiz(struct brw_context *brw,
struct intel_mipmap_tree *mt);
+
+static inline bool
+intel_miptree_set_clear_color(struct gl_context *ctx,
+ struct intel_mipmap_tree *mt,
+ union isl_color_value clear_color)
+{
+ if (memcmp(&mt->fast_clear_color, &clear_color, sizeof(clear_color)) != 0) {
+ mt->fast_clear_color = clear_color;
+ ctx->NewDriverState |= BRW_NEW_AUX_STATE;
+ return true;
+ }
+ return false;
+}
+
+static inline bool
+intel_miptree_set_depth_clear_value(struct gl_context *ctx,
+ struct intel_mipmap_tree *mt,
+ float clear_value)
+{
+ if (mt->fast_clear_color.f32[0] != clear_value) {
+ mt->fast_clear_color.f32[0] = clear_value;
+ ctx->NewDriverState |= BRW_NEW_AUX_STATE;
+ return true;
+ }
+ return false;
+}
+
#ifdef __cplusplus
}
#endif