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authorKenneth Graunke <[email protected]>2013-11-01 12:50:16 -0700
committerKenneth Graunke <[email protected]>2013-11-16 09:12:58 -0800
commit717241bf4a22184b8b69cf46b44273b7df5378d4 (patch)
treecd5180db5f62877e8ecfe037bf22c4ef19342166 /src/mesa
parentec8cc65926de3e7391f3bcec8ee26fc8f4d36159 (diff)
i965: Move enum brw_urb_write_flags from brw_eu.h to brw_defines.h.
Broadwell code should not include brw_eu.h (since it is for Gen4-7 assembly encoding), but needs the URB write flags enum. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Acked-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h71
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu.h71
2 files changed, 71 insertions, 71 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index bfea88a670f..e64d6387ee0 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -885,6 +885,77 @@ enum opcode {
GS_OPCODE_SET_CHANNEL_MASKS,
};
+enum brw_urb_write_flags {
+ BRW_URB_WRITE_NO_FLAGS = 0,
+
+ /**
+ * Causes a new URB entry to be allocated, and its address stored in the
+ * destination register (gen < 7).
+ */
+ BRW_URB_WRITE_ALLOCATE = 0x1,
+
+ /**
+ * Causes the current URB entry to be deallocated (gen < 7).
+ */
+ BRW_URB_WRITE_UNUSED = 0x2,
+
+ /**
+ * Causes the thread to terminate.
+ */
+ BRW_URB_WRITE_EOT = 0x4,
+
+ /**
+ * Indicates that the given URB entry is complete, and may be sent further
+ * down the 3D pipeline (gen < 7).
+ */
+ BRW_URB_WRITE_COMPLETE = 0x8,
+
+ /**
+ * Indicates that an additional offset (which may be different for the two
+ * vec4 slots) is stored in the message header (gen == 7).
+ */
+ BRW_URB_WRITE_PER_SLOT_OFFSET = 0x10,
+
+ /**
+ * Indicates that the channel masks in the URB_WRITE message header should
+ * not be overridden to 0xff (gen == 7).
+ */
+ BRW_URB_WRITE_USE_CHANNEL_MASKS = 0x20,
+
+ /**
+ * Indicates that the data should be sent to the URB using the
+ * URB_WRITE_OWORD message rather than URB_WRITE_HWORD (gen == 7). This
+ * causes offsets to be interpreted as multiples of an OWORD instead of an
+ * HWORD, and only allows one OWORD to be written.
+ */
+ BRW_URB_WRITE_OWORD = 0x40,
+
+ /**
+ * Convenient combination of flags: end the thread while simultaneously
+ * marking the given URB entry as complete.
+ */
+ BRW_URB_WRITE_EOT_COMPLETE = BRW_URB_WRITE_EOT | BRW_URB_WRITE_COMPLETE,
+
+ /**
+ * Convenient combination of flags: mark the given URB entry as complete
+ * and simultaneously allocate a new one.
+ */
+ BRW_URB_WRITE_ALLOCATE_COMPLETE =
+ BRW_URB_WRITE_ALLOCATE | BRW_URB_WRITE_COMPLETE,
+};
+
+#ifdef __cplusplus
+/**
+ * Allow brw_urb_write_flags enums to be ORed together.
+ */
+inline brw_urb_write_flags
+operator|(brw_urb_write_flags x, brw_urb_write_flags y)
+{
+ return static_cast<brw_urb_write_flags>(static_cast<int>(x) |
+ static_cast<int>(y));
+}
+#endif
+
#define BRW_PREDICATE_NONE 0
#define BRW_PREDICATE_NORMAL 1
#define BRW_PREDICATE_ALIGN1_ANYV 2
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 01f8bccdb2f..a6a65cae88b 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -228,77 +228,6 @@ void brw_set_dp_write_message(struct brw_compile *p,
GLuint end_of_thread,
GLuint send_commit_msg);
-enum brw_urb_write_flags {
- BRW_URB_WRITE_NO_FLAGS = 0,
-
- /**
- * Causes a new URB entry to be allocated, and its address stored in the
- * destination register (gen < 7).
- */
- BRW_URB_WRITE_ALLOCATE = 0x1,
-
- /**
- * Causes the current URB entry to be deallocated (gen < 7).
- */
- BRW_URB_WRITE_UNUSED = 0x2,
-
- /**
- * Causes the thread to terminate.
- */
- BRW_URB_WRITE_EOT = 0x4,
-
- /**
- * Indicates that the given URB entry is complete, and may be sent further
- * down the 3D pipeline (gen < 7).
- */
- BRW_URB_WRITE_COMPLETE = 0x8,
-
- /**
- * Indicates that an additional offset (which may be different for the two
- * vec4 slots) is stored in the message header (gen == 7).
- */
- BRW_URB_WRITE_PER_SLOT_OFFSET = 0x10,
-
- /**
- * Indicates that the channel masks in the URB_WRITE message header should
- * not be overridden to 0xff (gen == 7).
- */
- BRW_URB_WRITE_USE_CHANNEL_MASKS = 0x20,
-
- /**
- * Indicates that the data should be sent to the URB using the
- * URB_WRITE_OWORD message rather than URB_WRITE_HWORD (gen == 7). This
- * causes offsets to be interpreted as multiples of an OWORD instead of an
- * HWORD, and only allows one OWORD to be written.
- */
- BRW_URB_WRITE_OWORD = 0x40,
-
- /**
- * Convenient combination of flags: end the thread while simultaneously
- * marking the given URB entry as complete.
- */
- BRW_URB_WRITE_EOT_COMPLETE = BRW_URB_WRITE_EOT | BRW_URB_WRITE_COMPLETE,
-
- /**
- * Convenient combination of flags: mark the given URB entry as complete
- * and simultaneously allocate a new one.
- */
- BRW_URB_WRITE_ALLOCATE_COMPLETE =
- BRW_URB_WRITE_ALLOCATE | BRW_URB_WRITE_COMPLETE,
-};
-
-#ifdef __cplusplus
-/**
- * Allow brw_urb_write_flags enums to be ORed together.
- */
-inline brw_urb_write_flags
-operator|(brw_urb_write_flags x, brw_urb_write_flags y)
-{
- return static_cast<brw_urb_write_flags>(static_cast<int>(x) |
- static_cast<int>(y));
-}
-#endif
-
void brw_urb_WRITE(struct brw_compile *p,
struct brw_reg dest,
GLuint msg_reg_nr,