diff options
| author | Ben Widawsky <[email protected]> | 2016-01-04 10:48:39 -0800 |
|---|---|---|
| committer | Anuj Phogat <[email protected]> | 2017-06-09 16:02:59 -0700 |
| commit | 640f5d39570daee08ad56a445fa4cd6c97ca50c8 (patch) | |
| tree | 9ff1d14a0830a47fc800b09da2238112d87dc1e3 /src/mesa | |
| parent | 8c43e33560470e0630ad0eab65e7c6ecc4259b35 (diff) | |
i965/cnl: Implement depth count workaround
Signed-off-by: Ben Widawsky <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_queryobj.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c index a7b896243d6..9ad4779322b 100644 --- a/src/mesa/drivers/dri/i965/brw_queryobj.c +++ b/src/mesa/drivers/dri/i965/brw_queryobj.c @@ -111,6 +111,14 @@ brw_write_depth_count(struct brw_context *brw, struct brw_bo *query_bo, int idx) if (brw->gen == 9 && brw->gt == 4) flags |= PIPE_CONTROL_CS_STALL; + if (brw->gen >= 10) { + /* "Driver must program PIPE_CONTROL with only Depth Stall Enable bit set + * prior to programming a PIPE_CONTROL with Write PS Depth Count Post sync + * operation." + */ + brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_STALL); + } + brw_emit_pipe_control_write(brw, flags, query_bo, idx * sizeof(uint64_t), 0, 0); |