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authorEric Anholt <[email protected]>2010-01-26 18:04:03 -0800
committerEric Anholt <[email protected]>2010-01-26 18:27:07 -0800
commit2792baec343e5773ff51e93c1b6df8b63d3af4af (patch)
tree1fdcdcca03a0dfcd6d8b8c503b7ed9b334c086d5 /src/mesa
parentc8e6a0f2f8637d803006d207bb2fb8e4292bdb28 (diff)
intel: Remove dead code from having to clip copyteximage source rect.
mesa core does it now. If only it did so for other entrypoints.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_copy.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index 79994b4a6a0..d67451cf8ec 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -113,8 +113,6 @@ do_copy_texsubimage(struct intel_context *intel,
drm_intel_bo *dst_bo = intel_region_buffer(intel,
intelImage->mt->region,
INTEL_WRITE_PART);
- const GLint orig_x = x;
- const GLint orig_y = y;
GLuint image_x, image_y;
GLshort src_pitch;
@@ -124,9 +122,6 @@ do_copy_texsubimage(struct intel_context *intel,
intelImage->face,
0,
&image_x, &image_y);
- /* Update dst for clipped src. Need to also clip the source rect. */
- dstx += x - orig_x;
- dsty += y - orig_y;
/* Can't blit to tiled buffers with non-tile-aligned offset. */
if (intelImage->mt->region->tiling == I915_TILING_Y) {