diff options
author | Antia Puentes <[email protected]> | 2015-06-17 10:08:27 +0200 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2015-08-03 09:40:49 -0700 |
commit | 16072834babc487f78472f7e7b59d35249a3aac8 (patch) | |
tree | a9f501f05c53b67b764f1444a14c3c60d642a1d6 /src/mesa | |
parent | fa4e3c3c9f6f3a72a032499fccaa6e222d6a7fa4 (diff) |
i965/nir/vec4: Implement vector "any" operation
Adds NIR ALU operations:
* nir_op_bany2
* nir_op_bany3
* nir_op_bany4
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index 8a87759fcb9..a586f902f67 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -1228,6 +1228,20 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr) inst->saturate = instr->dest.saturate; break; + case nir_op_bany2: + case nir_op_bany3: + case nir_op_bany4: { + dst_reg tmp = dst_reg(this, glsl_type::bool_type); + tmp.writemask = brw_writemask_for_size(nir_op_infos[instr->op].input_sizes[0]); + + emit(CMP(tmp, op[0], src_reg(0), BRW_CONDITIONAL_NZ)); + + emit(MOV(dst, src_reg(0))); + inst = emit(MOV(dst, src_reg(~0))); + inst->predicate = BRW_PREDICATE_ALIGN16_ANY4H; + break; + } + default: unreachable("Unimplemented ALU operation"); } |