diff options
author | Jason Ekstrand <[email protected]> | 2015-10-03 11:32:29 -0700 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2015-10-03 11:32:29 -0700 |
commit | 09ba0a7c05a2240d905b8568e5bc30e06ccbdb3e (patch) | |
tree | cd513062546bf8ebd84c179cf248373e5252aba3 /src/mesa | |
parent | ef56cf7738ecb25e8c668c509097fc714ca71c96 (diff) | |
parent | 3cd5395206398847d554ddf4cad49192042bd8ef (diff) |
Merge remote-tracking branch 'mesa-public/master' into vulkan
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_nir.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.c | 39 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.h | 6 |
6 files changed, 26 insertions, 33 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 8a03597c72b..883b8cbf3e7 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -58,7 +58,7 @@ fs_visitor::nir_setup_inputs() { nir_inputs = bld.vgrf(BRW_REGISTER_TYPE_F, nir->num_inputs); - foreach_list_typed(nir_variable, var, node, &nir->inputs) { + nir_foreach_variable(var, &nir->inputs) { enum brw_reg_type type = brw_type_for_base_type(var->type); fs_reg input = offset(nir_inputs, bld, var->data.driver_location); @@ -122,7 +122,7 @@ fs_visitor::nir_setup_outputs() nir_outputs = bld.vgrf(BRW_REGISTER_TYPE_F, nir->num_outputs); - foreach_list_typed(nir_variable, var, node, &nir->outputs) { + nir_foreach_variable(var, &nir->outputs) { fs_reg reg = offset(nir_outputs, bld, var->data.driver_location); int vector_elements = @@ -180,7 +180,7 @@ fs_visitor::nir_setup_uniforms() uniforms = nir->num_uniforms; - foreach_list_typed(nir_variable, var, node, &nir->uniforms) { + nir_foreach_variable(var, &nir->uniforms) { /* UBO's and atomics don't take up space in the uniform file */ if (var->interface_type != NULL || var->type->contains_atomic()) continue; diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c index bae44d5aa24..7ab6afa8458 100644 --- a/src/mesa/drivers/dri/i965/brw_nir.c +++ b/src/mesa/drivers/dri/i965/brw_nir.c @@ -40,7 +40,7 @@ brw_nir_lower_outputs(nir_shader *nir, bool is_scalar) if (is_scalar) { nir_assign_var_locations(&nir->outputs, &nir->num_outputs, type_size_scalar); } else { - foreach_list_typed(nir_variable, var, node, &nir->outputs) + nir_foreach_variable(var, &nir->outputs) var->data.driver_location = var->data.location; } } diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp index f19d74610a1..d3326e9fb86 100644 --- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp +++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp @@ -129,7 +129,7 @@ brw_nir_setup_glsl_uniforms(nir_shader *shader, { unsigned comps_per_unit = is_scalar ? 1 : 4; - foreach_list_typed(nir_variable, var, node, &shader->uniforms) { + nir_foreach_variable(var, &shader->uniforms) { /* UBO's, atomics and samplers don't take up space in the uniform file */ if (var->interface_type != NULL || var->type->contains_atomic()) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index 6536b1bfeb8..37a74df6d71 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -119,7 +119,7 @@ vec4_visitor::nir_setup_inputs() { nir_inputs = ralloc_array(mem_ctx, src_reg, nir->num_inputs); - foreach_list_typed(nir_variable, var, node, &nir->inputs) { + nir_foreach_variable(var, &nir->inputs) { int offset = var->data.driver_location; unsigned size = type_size_vec4(var->type); for (unsigned i = 0; i < size; i++) { @@ -134,7 +134,7 @@ vec4_visitor::nir_setup_uniforms() { uniforms = nir->num_uniforms; - foreach_list_typed(nir_variable, var, node, &nir->uniforms) { + nir_foreach_variable(var, &nir->uniforms) { /* UBO's and atomics don't take up space in the uniform file */ if (var->interface_type != NULL || var->type->contains_atomic()) continue; diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 087bf5a53e1..21048885755 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -44,33 +44,23 @@ * (see enum brw_wm_barycentric_interp_mode) is needed by the fragment shader. */ unsigned -brw_compute_barycentric_interp_modes(struct brw_context *brw, +brw_compute_barycentric_interp_modes(const struct brw_device_info *devinfo, bool shade_model_flat, bool persample_shading, - const struct gl_fragment_program *fprog) + nir_shader *shader) { unsigned barycentric_interp_modes = 0; - int attr; - /* Loop through all fragment shader inputs to figure out what interpolation - * modes are in use, and set the appropriate bits in - * barycentric_interp_modes. - */ - for (attr = 0; attr < VARYING_SLOT_MAX; ++attr) { - enum glsl_interp_qualifier interp_qualifier = - fprog->InterpQualifier[attr]; - bool is_centroid = (fprog->IsCentroid & BITFIELD64_BIT(attr)) && - !persample_shading; - bool is_sample = (fprog->IsSample & BITFIELD64_BIT(attr)) || - persample_shading; - bool is_gl_Color = attr == VARYING_SLOT_COL0 || attr == VARYING_SLOT_COL1; - - /* Ignore unused inputs. */ - if (!(fprog->Base.InputsRead & BITFIELD64_BIT(attr))) - continue; + nir_foreach_variable(var, &shader->inputs) { + enum glsl_interp_qualifier interp_qualifier = var->data.interpolation; + bool is_centroid = var->data.centroid && !persample_shading; + bool is_sample = var->data.sample || persample_shading; + bool is_gl_Color = (var->data.location == VARYING_SLOT_COL0) || + (var->data.location == VARYING_SLOT_COL1); /* Ignore WPOS and FACE, because they don't require interpolation. */ - if (attr == VARYING_SLOT_POS || attr == VARYING_SLOT_FACE) + if (var->data.location == VARYING_SLOT_POS || + var->data.location == VARYING_SLOT_FACE) continue; /* Determine the set (or sets) of barycentric coordinates needed to @@ -88,7 +78,7 @@ brw_compute_barycentric_interp_modes(struct brw_context *brw, 1 << BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC; } if ((!is_centroid && !is_sample) || - brw->needs_unlit_centroid_workaround) { + devinfo->needs_unlit_centroid_workaround) { barycentric_interp_modes |= 1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC; } @@ -103,7 +93,7 @@ brw_compute_barycentric_interp_modes(struct brw_context *brw, 1 << BRW_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC; } if ((!is_centroid && !is_sample) || - brw->needs_unlit_centroid_workaround) { + devinfo->needs_unlit_centroid_workaround) { barycentric_interp_modes |= 1 << BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC; } @@ -220,9 +210,10 @@ brw_codegen_wm_prog(struct brw_context *brw, } prog_data.barycentric_interp_modes = - brw_compute_barycentric_interp_modes(brw, key->flat_shade, + brw_compute_barycentric_interp_modes(brw->intelScreen->devinfo, + key->flat_shade, key->persample_shading, - &fp->program); + fp->program.Base.nir); if (unlikely(brw->perf_debug)) { start_busy = (brw->batch.last_bo && diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index 667edf2eddf..053f2ee62dd 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -89,11 +89,13 @@ void brw_wm_debug_recompile(struct brw_context *brw, void brw_upload_wm_prog(struct brw_context *brw); +struct nir_shader; + unsigned -brw_compute_barycentric_interp_modes(struct brw_context *brw, +brw_compute_barycentric_interp_modes(const struct brw_device_info *devinfo, bool shade_model_flat, bool persample_shading, - const struct gl_fragment_program *fprog); + struct nir_shader *shader); #ifdef __cplusplus } // extern "C" |