diff options
author | Ian Romanick <[email protected]> | 2011-08-03 15:35:01 -0700 |
---|---|---|
committer | Ian Romanick <[email protected]> | 2011-08-16 14:09:43 -0700 |
commit | e7bf096e8b04931996c8c56548ce0b2c0af3a0dc (patch) | |
tree | 3407414c734e47673a61005b01592dcb29bcb978 /src/mesa | |
parent | 92ca560d68e8a6b532998707afcf4f60c0ce2806 (diff) |
ir_to_mesa: Implement ir_binop_any_nequal using DP4 w/saturate or DP4 w/SLT
The operation ir_binop_any_nequal is (a.x != b.x) || (a.y != b.y) ||
(a.z != b.z) || (a.w != b.w), and that is the same as any(bvec4(a.x !=
b.x, a.y != b.y, a.z != b.z, a.w != b.w)). Implement the any() part
the same way the regular ir_unop_any is implemented.
Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/program/ir_to_mesa.cpp | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index 1bd9a2eee1b..1c674ea8756 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/program/ir_to_mesa.cpp @@ -1249,8 +1249,26 @@ ir_to_mesa_visitor::visit(ir_expression *ir) ir->operands[1]->type->is_vector()) { src_reg temp = get_temp(glsl_type::vec4_type); emit(ir, OPCODE_SNE, dst_reg(temp), op[0], op[1]); - emit_dp(ir, result_dst, temp, temp, vector_elements); - emit(ir, OPCODE_SNE, result_dst, result_src, src_reg_for_float(0.0)); + + /* After the dot-product, the value will be an integer on the + * range [0,4]. Zero stays zero, and positive values become 1.0. + */ + ir_to_mesa_instruction *const dp = + emit_dp(ir, result_dst, temp, temp, vector_elements); + if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) { + /* The clamping to [0,1] can be done for free in the fragment + * shader with a saturate. + */ + dp->saturate = true; + } else { + /* Negating the result of the dot-product gives values on the range + * [-4, 0]. Zero stays zero, and negative values become 1.0. This + * achieved using SLT. + */ + src_reg slt_src = result_src; + slt_src.negate = ~slt_src.negate; + emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0)); + } } else { emit(ir, OPCODE_SNE, result_dst, op[0], op[1]); } |