diff options
| author | Alex Deucher <[email protected]> | 2008-05-13 13:38:30 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2008-05-13 13:38:30 -0400 |
| commit | d09aa2138bdedf32569844fa14cf88f28d41020a (patch) | |
| tree | 8ee6a22b3b503f46c6bf8387554326b72d4df4b7 /src/mesa | |
| parent | 9ef4126d48153d4754b29bd4231d29dfb15fa73f (diff) | |
R500: fixup r300EmitClearState() FP for r5xx
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/r300/r300_ioctl.c | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c index ede0bec5661..e95c797fa20 100644 --- a/src/mesa/drivers/dri/r300/r300_ioctl.c +++ b/src/mesa/drivers/dri/r300/r300_ioctl.c @@ -360,9 +360,20 @@ static void r300EmitClearState(GLcontext * ctx) R300_STATECHANGE(r300, r500fp); r500fp_start_fragment(0, 12); - e32(0x7808); - e32(R500_TEX_ID(0) | R500_TEX_INST_LD | R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED); - e32(R500_TEX_SRC_ADDR(0) | R500_TEX_SRC_S_SWIZ_R | + e32((R500_INST_TYPE_TEX | + R500_INST_TEX_SEM_WAIT | + R500_INST_RGB_WMASK_R | + R500_INST_RGB_WMASK_G | + R500_INST_RGB_WMASK_B | + R500_INST_ALPHA_WMASK | + R500_INST_RGB_CLAMP | + R500_INST_ALPHA_CLAMP)); + e32(R500_TEX_ID(0) | + R500_TEX_INST_LD | + R500_TEX_SEM_ACQUIRE | + R500_TEX_IGNORE_UNCOVERED); + e32(R500_TEX_SRC_ADDR(0) | + R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | R500_TEX_DST_ADDR(0) | R500_TEX_DST_R_SWIZ_R | @@ -388,21 +399,21 @@ static void r300EmitClearState(GLcontext * ctx) R500_INST_RGB_OMASK_R | R500_INST_RGB_OMASK_G | R500_INST_RGB_OMASK_B | - R500_INST_ALPHA_OMASK); + R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | + R500_INST_ALPHA_CLAMP); e32(R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | R500_RGB_ADDR2(0) | - R500_RGB_ADDR2_CONST | - R500_RGB_SRCP_OP_1_MINUS_2RGB0); + R500_RGB_ADDR2_CONST); e32(R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | R500_ALPHA_ADDR2(0) | - R500_ALPHA_ADDR2_CONST | - R500_ALPHA_SRCP_OP_1_MINUS_2A0); + R500_ALPHA_ADDR2_CONST); e32(R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | |