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authorKevin DeKorte <[email protected]>2009-07-20 18:56:47 -0400
committerAlex Deucher <[email protected]>2009-07-20 19:00:57 -0400
commitcc893d9a98255d3c26df7123ba5cc02e478c9328 (patch)
treec651c073b369363c47d698f1ba3e78133d7d0f91 /src/mesa
parent265d5eba658f38f5a9d12d57b701e4ffe49100eb (diff)
r600: fix dst reg indexing
This fixes segfaults in apps like teapot and tunnel
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index 1d41c5cf785..2d40dfa708e 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -2193,6 +2193,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
GLboolean next_ins(r700_AssemblerBase *pAsm)
{
struct prog_instruction *pILInst = &(pAsm->pILInst[pAsm->uiCurInst]);
+ uint index;
if( GL_TRUE == IsTex(pILInst->Opcode) )
{
@@ -2213,14 +2214,20 @@ GLboolean next_ins(r700_AssemblerBase *pAsm)
if(pAsm->D.dst.rtype == DST_REG_OUT)
{
+ if (pAsm->starting_export_register_number >= pAsm->D.dst.reg) {
+ index = 0;
+ } else {
+ index = pAsm->D.dst.reg - pAsm->starting_export_register_number;
+ }
+
if(pAsm->D.dst.op3)
{
// There is no mask for OP3 instructions, so all channels are written
- pAsm->pucOutMask[pAsm->D.dst.reg - pAsm->starting_export_register_number] = 0xF;
+ pAsm->pucOutMask[index] = 0xF;
}
else
{
- pAsm->pucOutMask[pAsm->D.dst.reg - pAsm->starting_export_register_number]
+ pAsm->pucOutMask[index]
|= (unsigned char)pAsm->pILInst[pAsm->uiCurInst].DstReg.WriteMask;
}
}