summaryrefslogtreecommitdiffstats
path: root/src/mesa
diff options
context:
space:
mode:
authorKenneth Graunke <[email protected]>2014-08-16 15:18:21 -0700
committerKenneth Graunke <[email protected]>2014-08-22 11:40:32 -0700
commit97d03b9366bfa55b27feb92aa5afacd9c5f6f421 (patch)
tree9c2d4c79967f37c20803094cf8bff27c5c72c30b /src/mesa
parentb8aa1005c82ff732f714cd0dcca39775aa368dd7 (diff)
i965: Disable try_emit_b2f_of_compare on Gen4-6.
The optimization relies on CMP setting the destination to 0, which is equivalent to 0.0f. However, early platforms only set the least significant byte, leaving the other bits undefined. So, we must disable the optimization on those platforms. Oddly, Sandybridge wasn't reported as broken. The PRM states that it only sets the LSB, but the internal documentation says that it follows the IVB behavior. Since it wasn't reported as broken, we believe it really does follow the IVB behavior. v2: Allow the optimization on Sandybridge (requested by Matt). +32 piglits on Ironlake. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?=79963 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index eca5d0cb01c..6e48be74852 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1135,6 +1135,13 @@ vec4_visitor::try_emit_mad(ir_expression *ir)
bool
vec4_visitor::try_emit_b2f_of_compare(ir_expression *ir)
{
+ /* This optimization relies on CMP setting the destination to 0 when
+ * false. Early hardware only sets the least significant bit, and
+ * leaves the other bits undefined. So we can't use it.
+ */
+ if (brw->gen < 6)
+ return false;
+
ir_expression *const cmp = ir->operands[0]->as_expression();
if (cmp == NULL)