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authorEric Anholt <[email protected]>2010-07-19 16:11:19 -0700
committerEric Anholt <[email protected]>2010-07-19 19:29:03 -0700
commite29cff62734b6aaf0b05dba0b3ed98fe78842a42 (patch)
tree44adaa1568556cd98cfccca13bca30d24cf54361 /src/mesa
parentbdcaaed6ff3238ea4317aff2f7a6947e4a72de9c (diff)
i965: Clarify the nr_regs calculation in brw_clip.c
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c
index 228ee3f3be1..96d278f1703 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -83,11 +83,16 @@ static void compile_clip_prog( struct brw_context *brw,
}
c.nr_attrs = brw_count_bits(c.key.attrs);
-
+
+ /* The vertex attributes start at a URB row-aligned offset after
+ * the 8-20 dword vertex header, and continue for a URB row-aligned
+ * length. nr_regs determines the urb_read_length from the start
+ * of the header to the end of the vertex data.
+ */
if (intel->gen == 5)
- c.nr_regs = (c.nr_attrs + 1) / 2 + 3; /* are vertices packed, or reg-aligned? */
+ c.nr_regs = 3 + (c.nr_attrs + 1) / 2;
else
- c.nr_regs = (c.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */
+ c.nr_regs = 1 + (c.nr_attrs + 1) / 2;
c.nr_bytes = c.nr_regs * REG_SIZE;