diff options
| author | Lionel Landwerlin <[email protected]> | 2018-08-28 11:41:42 +0100 |
|---|---|---|
| committer | Lionel Landwerlin <[email protected]> | 2019-03-07 15:08:31 +0000 |
| commit | acb50d6b1ff1b73a66e88862c99b65d87869e01d (patch) | |
| tree | 902cd99aa632419a6fbb1e21ec87c7281982a5e0 /src/mesa | |
| parent | ec526d6ba0bdb996416b7479330a424ff737df81 (diff) | |
intel/decoders: handle decoding MI_BBS from ring
An MI_BATCH_BUFFER_START in the ring buffer acts as a second level
batchbuffer (aka jump back to ring buffer when running into a
MI_BATCH_BUFFER_END).
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Rafael Antognolli <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_batchbuffer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index 0c7f2527218..a701f3bd353 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -828,7 +828,7 @@ submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd) if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) { gen_print_batch(&batch->decoder, batch->batch.map, 4 * USED_BATCH(*batch), - batch->batch.bo->gtt_offset); + batch->batch.bo->gtt_offset, false); } if (brw->ctx.Const.ResetStrategy == GL_LOSE_CONTEXT_ON_RESET_ARB) |