diff options
| author | Corbin Simpson <[email protected]> | 2008-06-01 11:45:30 -0700 |
|---|---|---|
| committer | Corbin Simpson <[email protected]> | 2008-06-01 11:45:30 -0700 |
| commit | 915e49e0fd61d7b8eee304d756813455612e98d9 (patch) | |
| tree | fd7a8cf55905ba3d6dc125482f8ec237fcda290d /src/mesa | |
| parent | c9ea62444c6969da8706ea88e12df8c458a6acce (diff) | |
r5xx: Enable depth write emission.
Thanks to nh for the r3xx version.
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/r300/r300_context.h | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r300/r300_state.c | 5 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r300/r500_fragprog.c | 6 |
3 files changed, 11 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index 817f783dffb..a5ec5ee46e2 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -833,6 +833,8 @@ struct r500_fragment_program { int max_temp_idx; + GLboolean writes_depth; + GLuint optimization; }; diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index f0a5176949d..550f7108542 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -411,7 +411,10 @@ static GLboolean current_fragment_program_writes_depth(GLcontext* ctx) (char *)ctx->FragmentProgram._Current; return (fp && fp->WritesDepth); } else { - return GL_FALSE; /* TODO: Verify depth writing works on R5xx */ + struct r500_fragment_program* fp = + (struct r500_fragment_program*)(char*) + ctx->FragmentProgram._Current; + return (fp && fp->writes_depth); } } diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.c b/src/mesa/drivers/dri/r300/r500_fragprog.c index a2312187a69..d5ae4a5f749 100644 --- a/src/mesa/drivers/dri/r300/r500_fragprog.c +++ b/src/mesa/drivers/dri/r300/r500_fragprog.c @@ -365,7 +365,9 @@ static void emit_alu(struct r500_fragment_program *fp, int counter, struct prog_ fp->inst[counter].inst0 |= (fpi->DstReg.WriteMask << 15); if (fpi->DstReg.Index == FRAG_RESULT_DEPR) - fp->inst[counter].inst4 = R500_ALPHA_W_OMASK; + fp->inst[counter].inst4 |= R500_ALPHA_W_OMASK; + /* Notify the state emission! */ + fp->writes_depth = GL_TRUE; } else { fp->inst[counter].inst0 = R500_INST_TYPE_ALU /* pixel_mask */ @@ -1251,6 +1253,8 @@ static void init_program(r300ContextPtr r300, struct r500_fragment_program *fp) fp->max_temp_idx = 1; /* Temp register offset. */ fp->temp_reg_offset = 0; + /* Whether or not we perform any depth writing. */ + fp->writes_depth = GL_FALSE; _mesa_memset(cs, 0, sizeof(*fp->cs)); for (i = 0; i < PFS_MAX_ALU_INST; i++) { |