diff options
author | Jordan Justen <[email protected]> | 2016-05-28 17:57:31 -0700 |
---|---|---|
committer | Jordan Justen <[email protected]> | 2016-05-29 09:59:55 -0700 |
commit | 7398a32c501ed7fedb5619ee7505f9070551d4bd (patch) | |
tree | 2639d5cfd78f6e5aa7c955ba48bba4768704e79c /src/mesa | |
parent | 160063b110d50d528217492308bbe353af2186e8 (diff) |
i965: Shrink stage_prog_data param array length
It appears we were over-allocating these arrays.
Previously we would use nir->num_uniforms directly for scalar
programs, and multiply it by 4 for vec4 programs.
Instead we should have been dividing by 4 in both cases to convert
from bytes to a gl_constant_value count. The size of gl_constant_value
is 4 bytes.
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_cs.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_gs.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_tcs.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_tes.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vs.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.c | 2 |
6 files changed, 6 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965/brw_cs.c index 0ab9ebdab3c..a9cbde9f07c 100644 --- a/src/mesa/drivers/dri/i965/brw_cs.c +++ b/src/mesa/drivers/dri/i965/brw_cs.c @@ -91,7 +91,7 @@ brw_codegen_cs_prog(struct brw_context *brw, * prog_data associated with the compiled program, and which will be freed * by the state cache. */ - int param_count = cp->program.Base.nir->num_uniforms; + int param_count = cp->program.Base.nir->num_uniforms / 4; /* The backend also sometimes adds params for texture size. */ param_count += 2 * ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits; diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index 8f5dcf359e9..7ead182da6c 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -119,9 +119,7 @@ brw_codegen_gs_prog(struct brw_context *brw, */ struct gl_shader *gs = prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; struct brw_shader *bgs = (struct brw_shader *) gs; - int param_count = gp->program.Base.nir->num_uniforms; - if (!compiler->scalar_stage[MESA_SHADER_GEOMETRY]) - param_count *= 4; + int param_count = gp->program.Base.nir->num_uniforms / 4; prog_data.base.base.param = rzalloc_array(NULL, const gl_constant_value *, param_count); diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c index 9589fa5edeb..5a514ef21e9 100644 --- a/src/mesa/drivers/dri/i965/brw_tcs.c +++ b/src/mesa/drivers/dri/i965/brw_tcs.c @@ -199,9 +199,7 @@ brw_codegen_tcs_prog(struct brw_context *brw, */ struct gl_shader *tcs = shader_prog ? shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL] : NULL; - int param_count = nir->num_uniforms; - if (!compiler->scalar_stage[MESA_SHADER_TESS_CTRL]) - param_count *= 4; + int param_count = nir->num_uniforms / 4; prog_data.base.base.param = rzalloc_array(NULL, const gl_constant_value *, param_count); diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c index b7f1677caec..a4cd4daadde 100644 --- a/src/mesa/drivers/dri/i965/brw_tes.c +++ b/src/mesa/drivers/dri/i965/brw_tes.c @@ -151,9 +151,7 @@ brw_codegen_tes_prog(struct brw_context *brw, * every uniform is a float which gets padded to the size of a vec4. */ struct gl_shader *tes = shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; - int param_count = nir->num_uniforms; - if (!compiler->scalar_stage[MESA_SHADER_TESS_EVAL]) - param_count *= 4; + int param_count = nir->num_uniforms / 4; prog_data.base.base.param = rzalloc_array(NULL, const gl_constant_value *, param_count); diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 2478e62c180..abf03b1fb7a 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -80,9 +80,7 @@ brw_codegen_vs_prog(struct brw_context *brw, * prog_data associated with the compiled program, and which will be freed * by the state cache. */ - int param_count = vp->program.Base.nir->num_uniforms; - if (!compiler->scalar_stage[MESA_SHADER_VERTEX]) - param_count *= 4; + int param_count = vp->program.Base.nir->num_uniforms / 4; if (vs) prog_data.base.base.nr_image_params = vs->base.NumImages; diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 1943d08ab66..c9c5d5e443e 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -97,7 +97,7 @@ brw_codegen_wm_prog(struct brw_context *brw, * prog_data associated with the compiled program, and which will be freed * by the state cache. */ - int param_count = fp->program.Base.nir->num_uniforms; + int param_count = fp->program.Base.nir->num_uniforms / 4; if (fs) prog_data.base.nr_image_params = fs->base.NumImages; /* The backend also sometimes adds params for texture size. */ |