diff options
| author | Jason Ekstrand <[email protected]> | 2018-05-18 16:39:21 -0700 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2018-06-28 13:25:18 -0700 |
| commit | b95b0e2918c052068caeb4f6c2802ba89be043a3 (patch) | |
| tree | 7105f47f94d123c51aa54bf164601e8ea9f4d17e /src/mesa | |
| parent | d5e028a57bb9e0da7cd31a043859038355236095 (diff) | |
intel/anv,blorp,i965: Implement the SKL 16x MSAA SIMD32 workaround
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 42cd08ceba9..b279f01e1a1 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -4032,6 +4032,22 @@ genX(upload_ps)(struct brw_context *brw) ps._16PixelDispatchEnable = prog_data->dispatch_16; ps._32PixelDispatchEnable = prog_data->dispatch_32; + /* From the Sky Lake PRM 3DSTATE_PS::32 Pixel Dispatch Enable: + * + * "When NUM_MULTISAMPLES = 16 or FORCE_SAMPLE_COUNT = 16, SIMD32 + * Dispatch must not be enabled for PER_PIXEL dispatch mode." + * + * Since 16x MSAA is first introduced on SKL, we don't need to apply + * the workaround on any older hardware. + * + * BRW_NEW_NUM_SAMPLES + */ + if (GEN_GEN >= 9 && !prog_data->persample_dispatch && + brw->num_samples == 16) { + assert(ps._8PixelDispatchEnable || ps._16PixelDispatchEnable); + ps._32PixelDispatchEnable = false; + } + ps.DispatchGRFStartRegisterForConstantSetupData0 = brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 0); ps.DispatchGRFStartRegisterForConstantSetupData1 = @@ -4057,6 +4073,7 @@ genX(upload_ps)(struct brw_context *brw) static const struct brw_tracked_state genX(ps_state) = { .dirty = { .mesa = _NEW_MULTISAMPLE | + (GEN_GEN >= 9 ? BRW_NEW_NUM_SAMPLES : 0) | (GEN_GEN < 8 ? _NEW_BUFFERS | _NEW_COLOR : 0), |