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authorJosh Vanderhoof <[email protected]>1999-11-03 18:50:44 +0000
committerJosh Vanderhoof <[email protected]>1999-11-03 18:50:44 +0000
commit0dd75e288467ee55dc91050f68895570e9659645 (patch)
treee12a60e5e4c71c92ca1ad4efe35ce4ea85903419 /src/mesa
parentb09a4cd913e2de612fddf5411185a257da35647c (diff)
swap operand order for Intel style REGOFF
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/x86/assyntax.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mesa/x86/assyntax.h b/src/mesa/x86/assyntax.h
index 0a8c1bda978..1d476ce49b0 100644
--- a/src/mesa/x86/assyntax.h
+++ b/src/mesa/x86/assyntax.h
@@ -974,12 +974,12 @@
#define B_REGIND(a) BYTE_PTR [a]
/* Register b indirect plus displacement a */
-#define P_REGOFF(a, b) [a + b]
-#define X_REGOFF(a, b) TBYTE_PTR [a + b]
-#define D_REGOFF(a, b) QWORD_PTR [a + b]
-#define L_REGOFF(a, b) DWORD_PTR [a + b]
-#define W_REGOFF(a, b) WORD_PTR [a + b]
-#define B_REGOFF(a, b) BYTE_PTR [a + b]
+#define P_REGOFF(a, b) [b + a]
+#define X_REGOFF(a, b) TBYTE_PTR [b + a]
+#define D_REGOFF(a, b) QWORD_PTR [b + a]
+#define L_REGOFF(a, b) DWORD_PTR [b + a]
+#define W_REGOFF(a, b) WORD_PTR [b + a]
+#define B_REGOFF(a, b) BYTE_PTR [b + a]
/* Reg indirect Base + Index + Displacement - this is mainly for 16-bit mode
* which has no scaling