i965: Update SF, SBE, and RASTER state for Broadwell.

The attribute override portion of 3DSTATE_SBE was split out into
3DSTATE_SBE_SWIZ; various bits of 3DSTATE_SF were split out into
3DSTATE_RASTER.

v2: Set Force URB Read Offset bit.  Eventually the URB read offset
    should be set in 3DSTATE_VS, but that will require some refactoring.

v3: Rebase on viewport array changes.

v4: Improve comments about URB read length/offset overrides.

Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>

5 files changed, 311 insertions, 2 deletions

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
index 4c5a2a0b20b..318da0da177 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -145,5 +145,6 @@ i965_FILES = \
 	gen8_fs_generator.cpp \
 	gen8_generator.cpp \
 	gen8_instruction.c \
+	gen8_sf_state.c \
 	gen8_vec4_generator.cpp \
         $()
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 7f4cd10e593..55f3da94c4a 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1640,20 +1640,39 @@ enum brw_message_target {
 /* GEN7/DW2: */
 # define HSW_SF_LINE_STIPPLE_ENABLE			14
 
+# define GEN8_SF_SMOOTH_POINT_ENABLE                    (1 << 13)
+
 #define _3DSTATE_SBE				0x781F /* GEN7+ */
 /* DW1 */
+# define GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH           (1 << 29)
+# define GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET           (1 << 28)
 # define GEN7_SBE_SWIZZLE_CONTROL_MODE			(1 << 28)
 # define GEN7_SBE_NUM_OUTPUTS_SHIFT			22
 # define GEN7_SBE_SWIZZLE_ENABLE			(1 << 21)
 # define GEN7_SBE_POINT_SPRITE_LOWERLEFT		(1 << 20)
 # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT		11
 # define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT		4
+# define GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT		5
 /* DW2-9: Attribute setup (same as DW8-15 of gen6 _3DSTATE_SF) */
 /* DW10: Point sprite texture coordinate enables */
 /* DW11: Constant interpolation enables */
 /* DW12: attr 0-7 wrap shortest enables */
 /* DW13: attr 8-16 wrap shortest enables */
 
+#define _3DSTATE_SBE_SWIZ                       0x7851 /* GEN8+ */
+
+#define _3DSTATE_RASTER                         0x7850 /* GEN8+ */
+/* DW1 */
+# define GEN8_RASTER_FRONT_WINDING_CCW                  (1 << 21)
+# define GEN8_RASTER_CULL_BOTH                          (0 << 16)
+# define GEN8_RASTER_CULL_NONE                          (1 << 16)
+# define GEN8_RASTER_CULL_FRONT                         (2 << 16)
+# define GEN8_RASTER_CULL_BACK                          (3 << 16)
+# define GEN8_RASTER_SMOOTH_POINT_ENABLE                (1 << 13)
+# define GEN8_RASTER_LINE_AA_ENABLE                     (1 << 2)
+# define GEN8_RASTER_SCISSOR_ENABLE                     (1 << 1)
+# define GEN8_RASTER_VIEWPORT_Z_CLIP_TEST_ENABLE        (1 << 0)
+
 enum brw_wm_barycentric_interp_mode {
    BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC		= 0,
    BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC	= 1,
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 77b8aa63007..cd23da02a79 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -131,6 +131,9 @@ extern const struct brw_tracked_state gen7_urb;
 extern const struct brw_tracked_state gen7_vs_state;
 extern const struct brw_tracked_state gen7_wm_state;
 extern const struct brw_tracked_state haswell_cut_index;
+extern const struct brw_tracked_state gen8_raster_state;
+extern const struct brw_tracked_state gen8_sbe_state;
+extern const struct brw_tracked_state gen8_sf_state;
 
 
 /* brw_misc_state.c */
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 65fea722945..0786c857970 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -302,8 +302,9 @@ static const struct brw_tracked_state *gen8_atoms[] =
    &gen7_gs_state,
    &gen7_sol_state,
    &gen7_clip_state,
-   &gen7_sbe_state,
-   &gen7_sf_state,
+   &gen8_raster_state,
+   &gen8_sbe_state,
+   &gen8_sf_state,
    &gen7_wm_state,
    &gen7_ps_state,
 
diff --git a/src/mesa/drivers/dri/i965/gen8_sf_state.c b/src/mesa/drivers/dri/i965/gen8_sf_state.c
new file mode 100644
index 00000000000..a5cd9f88781
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen8_sf_state.c
@@ -0,0 +1,285 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "brw_context.h"
+#include "brw_state.h"
+#include "brw_defines.h"
+#include "brw_util.h"
+#include "main/macros.h"
+#include "main/fbobject.h"
+#include "intel_batchbuffer.h"
+
+static void
+upload_sbe(struct brw_context *brw)
+{
+   struct gl_context *ctx = &brw->ctx;
+   /* CACHE_NEW_WM_PROG */
+   uint32_t num_outputs = brw->wm.prog_data->num_varying_inputs;
+   uint16_t attr_overrides[VARYING_SLOT_MAX];
+   uint32_t urb_entry_read_length;
+   uint32_t point_sprite_enables;
+   uint32_t flat_enables;
+
+   uint32_t dw1 =
+      GEN7_SBE_SWIZZLE_ENABLE |
+      num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT;
+
+   /* _NEW_BUFFERS */
+   bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
+
+   /* _NEW_POINT
+    *
+    * Window coordinates in an FBO are inverted, which means point
+    * sprite origin must be inverted.
+    */
+   if ((ctx->Point.SpriteOrigin == GL_LOWER_LEFT) != render_to_fbo)
+      dw1 |= GEN6_SF_POINT_SPRITE_LOWERLEFT;
+   else
+      dw1 |= GEN6_SF_POINT_SPRITE_UPPERLEFT;
+
+   /* BRW_NEW_VUE_MAP_GEOM_OUT | _NEW_POINT | _NEW_LIGHT | _NEW_PROGRAM |
+    * CACHE_NEW_WM_PROG
+    */
+   calculate_attr_overrides(brw, attr_overrides,
+                            &point_sprite_enables,
+                            &flat_enables,
+                            &urb_entry_read_length);
+
+   /* Typically, the URB entry read length and offset should be programmed in
+    * 3DSTATE_VS and 3DSTATE_GS; SBE inherits it from the last active stage
+    * which produces geometry.  However, we don't know the proper value until
+    * we call calculate_attr_overrides().
+    *
+    * To fit with our existing code, we override the inherited values and
+    * specify it here directly, as we did on previous generations.
+    */
+   dw1 |=
+      urb_entry_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
+      BRW_SF_URB_ENTRY_READ_OFFSET << GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT |
+      GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH |
+      GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET;
+
+   BEGIN_BATCH(4);
+   OUT_BATCH(_3DSTATE_SBE << 16 | (4 - 2));
+   OUT_BATCH(dw1);
+   OUT_BATCH(point_sprite_enables);
+   OUT_BATCH(flat_enables);
+   ADVANCE_BATCH();
+
+   BEGIN_BATCH(11);
+   OUT_BATCH(_3DSTATE_SBE_SWIZ << 16 | (11 - 2));
+
+   /* Output DWords 1 through 8: */
+   for (int i = 0; i < 8; i++) {
+      OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16);
+   }
+
+   OUT_BATCH(0); /* wrapshortest enables 0-7 */
+   OUT_BATCH(0); /* wrapshortest enables 8-15 */
+   ADVANCE_BATCH();
+}
+
+const struct brw_tracked_state gen8_sbe_state = {
+   .dirty = {
+      .mesa  = _NEW_LIGHT | _NEW_POINT,
+      .brw   = BRW_NEW_CONTEXT |
+               BRW_NEW_FRAGMENT_PROGRAM |
+               BRW_NEW_VUE_MAP_GEOM_OUT,
+      .cache = 0
+   },
+   .emit = upload_sbe,
+};
+
+static void
+upload_sf(struct brw_context *brw)
+{
+   struct gl_context *ctx = &brw->ctx;
+   uint32_t dw1 = 0, dw2 = 0, dw3 = 0;
+   float point_size;
+
+   dw1 = GEN6_SF_STATISTICS_ENABLE | GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
+
+   /* _NEW_LINE */
+   uint32_t line_width_u3_7 = U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7);
+   if (line_width_u3_7 == 0)
+      line_width_u3_7 = 1;
+   dw2 |= line_width_u3_7 << GEN6_SF_LINE_WIDTH_SHIFT;
+
+   if (ctx->Line.SmoothFlag) {
+      dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
+   }
+
+   /* Clamp to ARB_point_parameters user limits */
+   point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
+
+   /* Clamp to the hardware limits and convert to fixed point */
+   dw3 |= U_FIXED(CLAMP(point_size, 0.125, 255.875), 3);
+
+   /* _NEW_PROGRAM | _NEW_POINT */
+   if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))
+      dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH;
+
+   if (ctx->Point.SmoothFlag)
+      dw3 |= GEN8_SF_SMOOTH_POINT_ENABLE;
+
+   dw3 |= GEN6_SF_LINE_AA_MODE_TRUE;
+
+   /* _NEW_LIGHT */
+   if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
+      dw3 |= (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
+             (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
+             (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
+   } else {
+      dw3 |= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
+   }
+
+   BEGIN_BATCH(4);
+   OUT_BATCH(_3DSTATE_SF << 16 | (4 - 2));
+   OUT_BATCH(dw1);
+   OUT_BATCH(dw2);
+   OUT_BATCH(dw3);
+   ADVANCE_BATCH();
+}
+
+const struct brw_tracked_state gen8_sf_state = {
+   .dirty = {
+      .mesa  = _NEW_LIGHT |
+               _NEW_PROGRAM |
+               _NEW_LINE |
+               _NEW_POINT,
+      .brw   = BRW_NEW_CONTEXT,
+      .cache = 0,
+   },
+   .emit = upload_sf,
+};
+
+static void
+upload_raster(struct brw_context *brw)
+{
+   struct gl_context *ctx = &brw->ctx;
+   uint32_t dw1 = 0;
+
+   /* _NEW_BUFFERS */
+   bool render_to_fbo = _mesa_is_user_fbo(brw->ctx.DrawBuffer);
+
+   /* _NEW_POLYGON */
+   if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
+      dw1 |= GEN8_RASTER_FRONT_WINDING_CCW;
+
+   if (ctx->Polygon.CullFlag) {
+      switch (ctx->Polygon.CullFaceMode) {
+      case GL_FRONT:
+         dw1 |= GEN8_RASTER_CULL_FRONT;
+         break;
+      case GL_BACK:
+         dw1 |= GEN8_RASTER_CULL_BACK;
+         break;
+      case GL_FRONT_AND_BACK:
+         dw1 |= GEN8_RASTER_CULL_BOTH;
+         break;
+      default:
+         assert(0);
+         break;
+      }
+   } else {
+      dw1 |= GEN8_RASTER_CULL_NONE;
+   }
+
+   /* _NEW_POINT */
+   if (ctx->Point.SmoothFlag)
+      dw1 |= GEN8_RASTER_SMOOTH_POINT_ENABLE;
+
+   if (ctx->Polygon.OffsetFill)
+      dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
+
+   if (ctx->Polygon.OffsetLine)
+      dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
+
+   if (ctx->Polygon.OffsetPoint)
+      dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
+
+   switch (ctx->Polygon.FrontMode) {
+   case GL_FILL:
+      dw1 |= GEN6_SF_FRONT_SOLID;
+      break;
+   case GL_LINE:
+      dw1 |= GEN6_SF_FRONT_WIREFRAME;
+      break;
+   case GL_POINT:
+      dw1 |= GEN6_SF_FRONT_POINT;
+      break;
+
+   default:
+      assert(0);
+      break;
+   }
+
+   switch (ctx->Polygon.BackMode) {
+   case GL_FILL:
+      dw1 |= GEN6_SF_BACK_SOLID;
+      break;
+   case GL_LINE:
+      dw1 |= GEN6_SF_BACK_WIREFRAME;
+      break;
+   case GL_POINT:
+      dw1 |= GEN6_SF_BACK_POINT;
+      break;
+   default:
+      assert(0);
+      break;
+   }
+
+   /* _NEW_LINE */
+   if (ctx->Line.SmoothFlag)
+      dw1 |= GEN8_RASTER_LINE_AA_ENABLE;
+
+   /* _NEW_SCISSOR */
+   if (ctx->Scissor.EnableFlags)
+      dw1 |= GEN8_RASTER_SCISSOR_ENABLE;
+
+   /* _NEW_TRANSFORM */
+   if (!ctx->Transform.DepthClamp)
+      dw1 |= GEN8_RASTER_VIEWPORT_Z_CLIP_TEST_ENABLE;
+
+   BEGIN_BATCH(5);
+   OUT_BATCH(_3DSTATE_RASTER << 16 | (5 - 2));
+   OUT_BATCH(dw1);
+   OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant.  copied from gen4 */
+   OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
+   OUT_BATCH_F(0.0);
+   ADVANCE_BATCH();
+}
+
+const struct brw_tracked_state gen8_raster_state = {
+   .dirty = {
+      .mesa  = _NEW_BUFFERS |
+               _NEW_LINE |
+               _NEW_POINT |
+               _NEW_POLYGON |
+               _NEW_SCISSOR |
+               _NEW_TRANSFORM,
+      .brw   = BRW_NEW_CONTEXT,
+      .cache = 0,
+   },
+   .emit = upload_raster,
+};