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authorZhenyu Wang <[email protected]>2010-09-25 10:48:52 +0800
committerZhenyu Wang <[email protected]>2010-09-28 15:58:21 +0800
commit85fa900b932243785e528e73fe119c27fa1988c4 (patch)
tree9c2e8a2584ac265df7d51865dcbffa78da1eb82b /src/mesa
parentc58bf2cee5b0f14a585089084fec7767f33887a7 (diff)
i965: don't do calculation for delta_xy on sandybridge
Sandybridge doesn't have Xstart/Ystart in payload header.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_emit.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index a9ebc2689ce..d5219a3d116 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -173,6 +173,7 @@ void emit_delta_xy(struct brw_compile *p,
GLuint mask,
const struct brw_reg *arg0)
{
+ struct intel_context *intel = &p->brw->intel;
struct brw_reg r1 = brw_vec1_grf(1, 0);
if (mask == 0)
@@ -180,6 +181,21 @@ void emit_delta_xy(struct brw_compile *p,
assert(mask == WRITEMASK_XY);
+ if (intel->gen >= 6) {
+ /* XXX Gen6 WM doesn't have Xstart/Ystart in payload r1.0/r1.1.
+ Just add them with 0.0 for dst reg.. */
+ r1 = brw_imm_v(0x00000000);
+ brw_ADD(p,
+ dst[0],
+ retype(arg0[0], BRW_REGISTER_TYPE_UW),
+ r1);
+ brw_ADD(p,
+ dst[1],
+ retype(arg0[1], BRW_REGISTER_TYPE_UW),
+ r1);
+ return;
+ }
+
/* Calc delta X,Y by subtracting origin in r1 from the pixel
* centers produced by emit_pixel_xy().
*/