diff options
author | Anuj Phogat <[email protected]> | 2014-07-15 12:56:37 -0700 |
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committer | Anuj Phogat <[email protected]> | 2014-07-17 15:49:46 -0700 |
commit | 5d9f5cd35b63e8d7fdb42a5ad26c53d2a19f6985 (patch) | |
tree | 1289c52a5d9b52e7592dffa80fb8fa743e6971cb /src/mesa | |
parent | b656e3c603da46fe0acd9905dc039c93d76f0b06 (diff) |
Revert "i965: Extend compute-to-mrf pass to understand blocks of MOVs"
This reverts commit bbefb15e01e1c16af69646898918982ae00f8c92.
Fixes the 11 regressions caused in framebuffer_blit tests in
Khronos GLES3 CTS tests:
Original patch reduced the instruction count but had no performance
benefits. So, it's safe to revert it without causing any performance
regressions.
Signed-off-by: Anuj Phogat <[email protected]>
Acked-by: Kristian Høgsberg <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 63 |
1 files changed, 10 insertions, 53 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 1a5d9870d3f..b8dc2b6b278 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -2053,8 +2053,7 @@ bool fs_visitor::compute_to_mrf() { bool progress = false; - int next_ip = 0, block_size = 0, step = dispatch_width / 8; - fs_inst *block_start = NULL, *block_end = NULL; + int next_ip = 0; calculate_live_intervals(); @@ -2068,27 +2067,8 @@ fs_visitor::compute_to_mrf() inst->dst.type != inst->src[0].type || inst->src[0].abs || inst->src[0].negate || !inst->src[0].is_contiguous() || - inst->src[0].subreg_offset) { - block_start = NULL; + inst->src[0].subreg_offset) continue; - } - - /* We're trying to identify a block of GRF-to-MRF MOVs for the purpose - * of rewriting the send that assigned the GRFs to just return in the - * MRFs directly. send can't saturate, so if any of the MOVs do that, - * cancel the block. - */ - if (inst->saturate) { - block_start = NULL; - } else if (block_start && inst->dst.reg == block_end->dst.reg + step && - inst->src[0].reg == block_end->src[0].reg && - inst->src[0].reg_offset == block_end->src[0].reg_offset + 1) { - block_size++; - block_end = inst; - } else if (inst->src[0].reg_offset == 0) { - block_size = 1; - block_start = block_end = inst; - } /* Work out which hardware MRF registers are written by this * instruction. @@ -2131,8 +2111,14 @@ fs_visitor::compute_to_mrf() if (scan_inst->is_partial_write()) break; - /* SEND instructions can't have MRF as a destination before Gen7. */ - if (brw->gen < 7 && scan_inst->mlen) + /* Things returning more than one register would need us to + * understand coalescing out more than one MOV at a time. + */ + if (scan_inst->regs_written > 1) + break; + + /* SEND instructions can't have MRF as a destination. */ + if (scan_inst->mlen) break; if (brw->gen == 6) { @@ -2144,35 +2130,6 @@ fs_visitor::compute_to_mrf() } } - /* We have a contiguous block of mov to MRF that aligns with the - * return registers of a send instruction. Modify the send - * instruction to just return in the MRFs. - */ - if (scan_inst->mlen > 0 && - scan_inst->regs_written == block_size && block_size > 1) { - int i = 0; - - scan_inst->dst.file = MRF; - scan_inst->dst.reg = block_start->dst.reg; - assert(!block_start->saturate); - - for (fs_inst *next, *mov = block_start; - i < block_size; - mov = next, i++) { - next = (fs_inst *) mov->next; - mov->remove(); - } - - progress = true; - break; - } - - /* If the block size we've tracked doesn't match the regs_written - * of the instruction, we can't do anything. - */ - if (scan_inst->regs_written > 1) - break; - if (scan_inst->dst.reg_offset == inst->src[0].reg_offset) { /* Found the creator of our MRF's source value. */ scan_inst->dst.file = MRF; |