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authorLionel Landwerlin <[email protected]>2017-06-15 15:22:19 +0100
committerLionel Landwerlin <[email protected]>2017-06-19 22:11:00 +0100
commitc77d98ef32a0f9763d4c8945527d00ab98e748cc (patch)
tree551f2c24e046e091182dcb9b9326b07cfade4e56 /src/mesa
parente5743ee014a82f228085dfcd5d653fcbd3d86fe4 (diff)
intel: common: express timestamps units in frequency
Rather than storing the period as a double that looses some precision. Also fixes the Gen9LP timestamp frequency which is no 19200123 but 19200000 as pointed by Ville : https://lists.freedesktop.org/archives/intel-gfx/2017-April/125126.html Finally add the Cannonlake timestamp frequency. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_queryobj.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
index bccd33b9d38..04ce9a94cad 100644
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -47,7 +47,7 @@ brw_timebase_scale(struct brw_context *brw, uint64_t gpu_timestamp)
{
const struct gen_device_info *devinfo = &brw->screen->devinfo;
- return (double)gpu_timestamp * devinfo->timebase_scale;
+ return (1000000000ull * gpu_timestamp) / devinfo->timestamp_frequency;
}
/* As best we know currently, the Gen HW timestamps are 36bits across