diff options
author | Eric Anholt <[email protected]> | 2013-05-30 14:53:55 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2013-06-26 01:07:11 -0700 |
commit | a2ca98b211138e2e4ac906cacefe02b4e064e01c (patch) | |
tree | e9532258c7c7a3c4b51015ab2e00f7bd971e8de7 /src/mesa | |
parent | da00782ed81776473270028cda262c913d737438 (diff) |
i965: Add debug to INTEL_DEBUG=blorp describing hiz/blit/clear ops.
I think we've all added instrumentation at one point or another to see
what's being called in blorp. Now you can quickly get output like:
Testing glCopyPixels(depth).
intel_hiz_exec depth clear to mt 0x16d9160 level 0 layer 0
intel_hiz_exec depth resolve to mt 0x16d9160 level 0 layer 0
intel_hiz_exec hiz ambiguate to mt 0x16d9160 level 0 layer 0
intel_hiz_exec depth resolve to mt 0x16d9160 level 0 layer 0
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.cpp | 22 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 7 |
3 files changed, 39 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 9c9a4a7b38d..c7e7cd23126 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -29,6 +29,8 @@ #include "gen6_blorp.h" #include "gen7_blorp.h" +#define FILE_DEBUG_FLAG DEBUG_BLORP + brw_blorp_mip_info::brw_blorp_mip_info() : mt(NULL), level(0), @@ -160,6 +162,26 @@ void intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt, unsigned int level, unsigned int layer, gen6_hiz_op op) { + const char *opname = NULL; + + switch (op) { + case GEN6_HIZ_OP_DEPTH_RESOLVE: + opname = "depth resolve"; + break; + case GEN6_HIZ_OP_HIZ_RESOLVE: + opname = "hiz ambiguate"; + break; + case GEN6_HIZ_OP_DEPTH_CLEAR: + opname = "depth clear"; + break; + case GEN6_HIZ_OP_NONE: + opname = "noop?"; + break; + } + + DBG("%s %s to mt %p level %d layer %d\n", + __FUNCTION__, opname, mt, level, layer); + brw_hiz_op_params params(mt, level, layer, op); brw_blorp_exec(intel, ¶ms); } diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index 8694128d25f..61403454d49 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp @@ -34,6 +34,7 @@ #include "brw_eu.h" #include "brw_state.h" +#define FILE_DEBUG_FLAG DEBUG_BLORP /** * Helper function for handling mirror image blits. @@ -144,6 +145,15 @@ brw_blorp_blit_miptrees(struct intel_context *intel, intel_miptree_slice_resolve_depth(intel, src_mt, src_level, src_layer); intel_miptree_slice_resolve_depth(intel, dst_mt, dst_level, dst_layer); + DBG("%s from %s mt %p %d %d (%f,%f) (%f,%f)" + "to %s mt %p %d %d (%f,%f) (%f,%f) (flip %d,%d)\n", + __FUNCTION__, + _mesa_get_format_name(src_mt->format), src_mt, + src_level, src_layer, src_x0, src_y0, src_x1, src_y1, + _mesa_get_format_name(dst_mt->format), dst_mt, + dst_level, dst_layer, dst_x0, dst_y0, dst_x1, dst_y1, + mirror_x, mirror_y); + brw_blorp_blit_params params(brw_context(&intel->ctx), src_mt, src_level, src_layer, dst_mt, dst_level, dst_layer, diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp index 85449bdda09..f925ab32d1e 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp @@ -37,6 +37,8 @@ extern "C" { #include "brw_eu.h" #include "brw_state.h" +#define FILE_DEBUG_FLAG DEBUG_BLORP + struct brw_blorp_const_color_prog_key { bool use_simd16_replicated_data; @@ -489,6 +491,9 @@ brw_blorp_clear_color(struct intel_context *intel, struct gl_framebuffer *fb, } } + DBG("%s to mt %p level %d layer %d\n", __FUNCTION__, + irb->mt, irb->mt_level, irb->mt_layer); + brw_blorp_exec(intel, ¶ms); if (is_fast_clear) { @@ -508,6 +513,8 @@ brw_blorp_resolve_color(struct intel_context *intel, struct intel_mipmap_tree *m { struct brw_context *brw = brw_context(&intel->ctx); + DBG("%s to mt %p\n", __FUNCTION__, mt); + brw_blorp_rt_resolve_params params(brw, mt); brw_blorp_exec(intel, ¶ms); mt->mcs_state = INTEL_MCS_STATE_RESOLVED; |