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authorFrancisco Jerez <[email protected]>2016-03-11 15:22:56 -0800
committerEmil Velikov <[email protected]>2016-03-29 11:30:43 +0100
commita0268d6cb5d0a479081c435ccbf73adeb3227393 (patch)
tree35ed6fcfa5e07503d8b26df24c3beade602a16a4 /src/mesa
parented74d2703406bebcff07dcec4b63b0a35bdf97c4 (diff)
i965/fs: Add missing analysis invalidation in opt_sampler_eot().
Bug found by the liveness analysis validation pass that will be introduced in a later commit. opt_sampler_eot() was allocating registers and inserting and removing instructions, which makes the cached liveness analysis calculation inconsistent with the shader IR, so it must be invalidated. Cc: [email protected] Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit 6691c03fd39be463e1d222b56e3ec8da9f3b7f24)
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 740e9e20b79..1b0f2b7a736 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2441,8 +2441,10 @@ fs_visitor::opt_sampler_eot()
* we have enough space, but it will make sure the dead code eliminator kills
* the instruction that this will replace.
*/
- if (tex_inst->header_size != 0)
+ if (tex_inst->header_size != 0) {
+ invalidate_live_intervals();
return true;
+ }
fs_reg send_header = ibld.vgrf(BRW_REGISTER_TYPE_F,
load_payload->sources + 1);
@@ -2473,6 +2475,7 @@ fs_visitor::opt_sampler_eot()
tex_inst->insert_before(cfg->blocks[cfg->num_blocks - 1], new_load_payload);
tex_inst->src[0] = send_header;
+ invalidate_live_intervals();
return true;
}