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authorAnuj Phogat <[email protected]>2015-04-10 04:35:24 -0700
committerAnuj Phogat <[email protected]>2015-04-17 11:48:38 -0700
commit79010c9a531f45d2b6740ac26f4b04c169f5dc7a (patch)
treef97c44d6f2ee2e145e0ca8ba5127a8c630eddc08 /src/mesa
parentc6b0922c31983c76f1b2b9df66ae50b25b966bee (diff)
i965: Render R16G16B16X16 as R16G16B16A16
This enables using _mesa_meta_pbo_TexSubImage() to upload data to R16G16B16X16 texture. Earlier it fell back to slower paths. Jenkins run shows no piglit regressions. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_surface_formats.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index c7fb7073381..c5fde350fe3 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -590,6 +590,12 @@ brw_init_surface_formats(struct brw_context *brw)
case BRW_SURFACEFORMAT_L16_UNORM:
render = BRW_SURFACEFORMAT_R16_UNORM;
break;
+ case BRW_SURFACEFORMAT_R16G16B16X16_UNORM:
+ render = BRW_SURFACEFORMAT_R16G16B16A16_UNORM;
+ break;
+ case BRW_SURFACEFORMAT_R16G16B16X16_FLOAT:
+ render = BRW_SURFACEFORMAT_R16G16B16A16_FLOAT;
+ break;
case BRW_SURFACEFORMAT_B8G8R8X8_UNORM:
/* XRGB is handled as ARGB because the chips in this family
* cannot render to XRGB targets. This means that we have to