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authorJason Ekstrand <[email protected]>2018-05-17 23:26:02 -0700
committerJason Ekstrand <[email protected]>2018-06-28 13:19:38 -0700
commitd5e028a57bb9e0da7cd31a043859038355236095 (patch)
tree846805f6d9fb7028a9cc70ce1400b5bb8d4bc66e /src/mesa
parentbcbc7d3a1756af9f3135f53c89be253732c9e39c (diff)
intel/fs: Add fields to wm_prog_data for SIMD32 dispatch
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/gen4_blorp_exec.h1
-rw-r--r--src/mesa/drivers/dri/i965/genX_state_upload.c2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen4_blorp_exec.h b/src/mesa/drivers/dri/i965/gen4_blorp_exec.h
index e3b90f12d96..0edc518fa35 100644
--- a/src/mesa/drivers/dri/i965/gen4_blorp_exec.h
+++ b/src/mesa/drivers/dri/i965/gen4_blorp_exec.h
@@ -132,6 +132,7 @@ blorp_emit_wm_state(struct blorp_batch *batch,
wm._8PixelDispatchEnable = prog_data->dispatch_8;
wm._16PixelDispatchEnable = prog_data->dispatch_16;
+ wm._32PixelDispatchEnable = prog_data->dispatch_32;
#if GEN_GEN == 4
wm.KernelStartPointer0 =
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 189245d91f9..42cd08ceba9 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -1895,6 +1895,7 @@ genX(upload_wm)(struct brw_context *brw)
#if GEN_GEN <= 6
wm._8PixelDispatchEnable = wm_prog_data->dispatch_8;
wm._16PixelDispatchEnable = wm_prog_data->dispatch_16;
+ wm._32PixelDispatchEnable = wm_prog_data->dispatch_32;
#endif
#if GEN_GEN == 4
@@ -4029,6 +4030,7 @@ genX(upload_ps)(struct brw_context *brw)
ps._8PixelDispatchEnable = prog_data->dispatch_8;
ps._16PixelDispatchEnable = prog_data->dispatch_16;
+ ps._32PixelDispatchEnable = prog_data->dispatch_32;
ps.DispatchGRFStartRegisterForConstantSetupData0 =
brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 0);