diff options
| author | Brian Paul <[email protected]> | 2009-03-31 10:53:56 -0600 |
|---|---|---|
| committer | Brian Paul <[email protected]> | 2009-04-03 09:07:03 -0600 |
| commit | 5f1ce6b87e837b9f6bc2a4f3e81cf8feea4af2df (patch) | |
| tree | 6802975fb49229b7200d350d1315dedb5b7475f8 /src/mesa | |
| parent | ed8f54aa65eed2cdef79ddc110dad217d3955ec7 (diff) | |
i965: comments
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 7909fd65a93..90d74c2885c 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -105,12 +105,17 @@ brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c) brw_wm_pass1(c); /* Register allocation. + * Divide by two because we operate on 16 pixels at a time and require + * two GRF entries for each logical shader register. */ c->grf_limit = BRW_WM_MAX_GRF / 2; brw_wm_pass2(c); + /* how many general-purpose registers are used */ c->prog_data.total_grf = c->max_wm_grf; + + /* Scratch space is used for register spilling */ if (c->last_scratch) { c->prog_data.total_scratch = c->last_scratch + 0x40; } |