nir: Get rid of nir_shader::stage

It's redundant with nir_shader::info::stage.

Acked-by: Timothy Arceri <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>

3 files changed, 11 insertions, 9 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp
index 1fe5ad66f54..1a28e63fcae 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -296,10 +296,12 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
                NIR_PASS_V(producer, nir_lower_indirect_derefs, indirect_mask);
                NIR_PASS_V(consumer, nir_lower_indirect_derefs, indirect_mask);
 
-               const bool p_is_scalar = compiler->scalar_stage[producer->stage];
+               const bool p_is_scalar =
+                  compiler->scalar_stage[producer->info.stage];
                producer = brw_nir_optimize(producer, compiler, p_is_scalar);
 
-               const bool c_is_scalar = compiler->scalar_stage[producer->stage];
+               const bool c_is_scalar =
+                  compiler->scalar_stage[producer->info.stage];
                consumer = brw_nir_optimize(consumer, compiler, c_is_scalar);
             }
 
diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
index 62755fda206..9e135cbb1a1 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
@@ -206,8 +206,8 @@ brw_nir_setup_glsl_uniforms(void *mem_ctx, nir_shader *shader,
          brw_nir_setup_glsl_builtin_uniform(var, prog, stage_prog_data,
                                             is_scalar);
       } else {
-         brw_nir_setup_glsl_uniform(shader->stage, var, prog, stage_prog_data,
-                                    is_scalar);
+         brw_nir_setup_glsl_uniform(shader->info.stage, var, prog,
+                                    stage_prog_data, is_scalar);
       }
    }
 }
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 5a439aaf92a..4effd8074ed 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -328,7 +328,7 @@ st_finalize_nir(struct st_context *st, struct gl_program *prog, nir_shader *nir)
    NIR_PASS_V(nir, nir_lower_var_copies);
    NIR_PASS_V(nir, nir_lower_io_types);
 
-   if (nir->stage == MESA_SHADER_VERTEX) {
+   if (nir->info.stage == MESA_SHADER_VERTEX) {
       /* Needs special handling so drvloc matches the vbo state: */
       st_nir_assign_vs_in_locations(prog, nir);
       /* Re-lower global vars, to deal with any dead VS inputs. */
@@ -339,7 +339,7 @@ st_finalize_nir(struct st_context *st, struct gl_program *prog, nir_shader *nir)
                                &nir->num_outputs,
                                type_size);
       st_nir_fixup_varying_slots(st, &nir->outputs);
-   } else if (nir->stage == MESA_SHADER_FRAGMENT) {
+   } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
       sort_varyings(&nir->inputs);
       nir_assign_var_locations(&nir->inputs,
                                &nir->num_inputs,
@@ -348,14 +348,14 @@ st_finalize_nir(struct st_context *st, struct gl_program *prog, nir_shader *nir)
       nir_assign_var_locations(&nir->outputs,
                                &nir->num_outputs,
                                type_size);
-   } else if (nir->stage == MESA_SHADER_COMPUTE) {
+   } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
        /* TODO? */
    } else {
       unreachable("invalid shader type for tgsi bypass\n");
    }
 
    struct gl_shader_program *shader_program;
-   switch (nir->stage) {
+   switch (nir->info.stage) {
    case MESA_SHADER_VERTEX:
       shader_program = ((struct st_vertex_program *)prog)->shader_program;
       break;
@@ -371,7 +371,7 @@ st_finalize_nir(struct st_context *st, struct gl_program *prog, nir_shader *nir)
    }
 
    NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
-         st->ctx->Const.Program[nir->stage].MaxAtomicBuffers);
+         st->ctx->Const.Program[nir->info.stage].MaxAtomicBuffers);
 
    st_nir_assign_uniform_locations(prog, shader_program,
                                    &nir->uniforms, &nir->num_uniforms);