diff options
| author | Andre Maasikas <[email protected]> | 2010-08-18 11:57:28 +0300 |
|---|---|---|
| committer | Andre Maasikas <[email protected]> | 2010-08-18 11:57:28 +0300 |
| commit | c17d5de593fbfee91b799894b1c1a8a37a6a9c95 (patch) | |
| tree | bcaf0cf143964cb8d60d60182f39046fd76f1e6b /src/mesa | |
| parent | a57b1e579d1a76a813f48ae541a1edebb7f07607 (diff) | |
r600: implement DP2 opcode
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/r600/r700_assembler.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c index 94bc26145d6..4902f7630ca 100644 --- a/src/mesa/drivers/dri/r600/r700_assembler.c +++ b/src/mesa/drivers/dri/r600/r700_assembler.c @@ -3017,7 +3017,14 @@ GLboolean assemble_DOT(r700_AssemblerBase *pAsm) return GL_FALSE; } - if(OPCODE_DP3 == pAsm->pILInst[pAsm->uiCurInst].Opcode) + if(OPCODE_DP2 == pAsm->pILInst[pAsm->uiCurInst].Opcode) + { + zerocomp_PVSSRC(&(pAsm->S[0].src),2); + zerocomp_PVSSRC(&(pAsm->S[0].src),3); + zerocomp_PVSSRC(&(pAsm->S[1].src),2); + zerocomp_PVSSRC(&(pAsm->S[1].src),3); + } + else if(OPCODE_DP3 == pAsm->pILInst[pAsm->uiCurInst].Opcode) { zerocomp_PVSSRC(&(pAsm->S[0].src), 3); zerocomp_PVSSRC(&(pAsm->S[1].src), 3); @@ -5694,6 +5701,7 @@ GLboolean AssembleInstr(GLuint uiFirstInst, return GL_FALSE; break; + case OPCODE_DP2: case OPCODE_DP3: case OPCODE_DP4: case OPCODE_DPH: @@ -6019,7 +6027,7 @@ GLboolean AssembleInstr(GLuint uiFirstInst, return GL_TRUE; default: - radeon_error("internal: unknown instruction\n"); + radeon_error("r600: unknown instruction %d\n", pILInst[i].Opcode); return GL_FALSE; } } |