diff options
author | Rafael Antognolli <[email protected]> | 2017-05-09 17:12:11 -0700 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2017-05-11 21:27:38 -0700 |
commit | 5bbcbabd867c740646af69ace756941e2880d86e (patch) | |
tree | d7f603c169275e18fd1187ee84b817b03eeded97 /src/mesa | |
parent | 71bfb44005bf8e7e7a46577e4030cbe69e020c5d (diff) |
i965: Port 3DSTATE_INDEX_BUFFER to genxml.
Also make the brw_get_index_type() function not shift its return, since that
is genxml's job now.
Signed-off-by: Rafael Antognolli <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_draw_upload.c | 39 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen8_draw_upload.c | 27 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 41 |
5 files changed, 40 insertions, 74 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 1fac63225f8..6b3750001f7 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1398,10 +1398,10 @@ unsigned brw_get_vertex_surface_type(struct brw_context *brw, static inline unsigned brw_get_index_type(unsigned index_size) { - /* The hw needs 0x00000000, 0x00000100, and 0x00000200 for ubyte, ushort, - * and uint, respectively. + /* The hw needs 0x00, 0x01, and 0x02 for ubyte, ushort, and uint, + * respectively. */ - return (index_size >> 1) << 8; + return index_size >> 1; } void brw_prepare_vertices(struct brw_context *brw); diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 8b30151b816..2ec9a013cd9 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -791,42 +791,3 @@ const struct brw_tracked_state brw_indices = { }, .emit = brw_upload_indices, }; - -static void -brw_emit_index_buffer(struct brw_context *brw) -{ - const struct _mesa_index_buffer *index_buffer = brw->ib.ib; - GLuint cut_index_setting; - - if (index_buffer == NULL) - return; - - if (brw->prim_restart.enable_cut_index && !brw->is_haswell) { - cut_index_setting = BRW_CUT_INDEX_ENABLE; - } else { - cut_index_setting = 0; - } - - BEGIN_BATCH(3); - OUT_BATCH(CMD_INDEX_BUFFER << 16 | - cut_index_setting | - brw_get_index_type(index_buffer->index_size) | - 1); - OUT_RELOC(brw->ib.bo, - I915_GEM_DOMAIN_VERTEX, 0, - 0); - OUT_RELOC(brw->ib.bo, - I915_GEM_DOMAIN_VERTEX, 0, - brw->ib.size - 1); - ADVANCE_BATCH(); -} - -const struct brw_tracked_state brw_index_buffer = { - .dirty = { - .mesa = 0, - .brw = BRW_NEW_BATCH | - BRW_NEW_BLORP | - BRW_NEW_INDEX_BUFFER, - }, - .emit = brw_emit_index_buffer, -}; diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 739deafdfa2..525521d4ce3 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -111,7 +111,6 @@ extern const struct brw_tracked_state gen7_depthbuffer; extern const struct brw_tracked_state gen7_l3_state; extern const struct brw_tracked_state gen7_push_constant_space; extern const struct brw_tracked_state gen7_urb; -extern const struct brw_tracked_state gen8_index_buffer; extern const struct brw_tracked_state gen8_pma_fix; extern const struct brw_tracked_state gen8_vf_topology; extern const struct brw_tracked_state brw_cs_work_groups_surface; diff --git a/src/mesa/drivers/dri/i965/gen8_draw_upload.c b/src/mesa/drivers/dri/i965/gen8_draw_upload.c index 8db160b5eca..01c3ac3e9a2 100644 --- a/src/mesa/drivers/dri/i965/gen8_draw_upload.c +++ b/src/mesa/drivers/dri/i965/gen8_draw_upload.c @@ -35,33 +35,6 @@ #include "intel_buffer_objects.h" static void -gen8_emit_index_buffer(struct brw_context *brw) -{ - const struct _mesa_index_buffer *index_buffer = brw->ib.ib; - uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB; - - if (index_buffer == NULL) - return; - - BEGIN_BATCH(5); - OUT_BATCH(CMD_INDEX_BUFFER << 16 | (5 - 2)); - OUT_BATCH(brw_get_index_type(index_buffer->index_size) | mocs_wb); - OUT_RELOC64(brw->ib.bo, I915_GEM_DOMAIN_VERTEX, 0, 0); - OUT_BATCH(brw->ib.size); - ADVANCE_BATCH(); -} - -const struct brw_tracked_state gen8_index_buffer = { - .dirty = { - .mesa = 0, - .brw = BRW_NEW_BATCH | - BRW_NEW_BLORP | - BRW_NEW_INDEX_BUFFER, - }, - .emit = gen8_emit_index_buffer, -}; - -static void gen8_emit_vf_topology(struct brw_context *brw) { BEGIN_BATCH(2); diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 416677c6712..a0eedb5dc60 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -841,6 +841,39 @@ static const struct brw_tracked_state genX(vertices) = { .emit = genX(emit_vertices), }; +static void +genX(emit_index_buffer)(struct brw_context *brw) +{ + const struct _mesa_index_buffer *index_buffer = brw->ib.ib; + + if (index_buffer == NULL) + return; + + brw_batch_emit(brw, GENX(3DSTATE_INDEX_BUFFER), ib) { +#if GEN_GEN < 8 && !GEN_IS_HASWELL + ib.CutIndexEnable = brw->prim_restart.enable_cut_index; +#endif + ib.IndexFormat = brw_get_index_type(index_buffer->index_size); + ib.BufferStartingAddress = vertex_bo(brw->ib.bo, 0); +#if GEN_GEN >= 8 + ib.IndexBufferMOCS = GEN_GEN >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB; + ib.BufferSize = brw->ib.size; +#else + ib.BufferEndingAddress = vertex_bo(brw->ib.bo, brw->ib.size - 1); +#endif + } +} + +static const struct brw_tracked_state genX(index_buffer) = { + .dirty = { + .mesa = 0, + .brw = BRW_NEW_BATCH | + BRW_NEW_BLORP | + BRW_NEW_INDEX_BUFFER, + }, + .emit = genX(emit_index_buffer), +}; + #if GEN_IS_HASWELL || GEN_GEN >= 8 static void genX(upload_cut_index)(struct brw_context *brw) @@ -4104,7 +4137,7 @@ genX(init_atoms)(struct brw_context *brw) &genX(drawing_rect), &brw_indices, /* must come before brw_vertices */ - &brw_index_buffer, + &genX(index_buffer), &genX(vertices), &brw_constant_buffer @@ -4171,7 +4204,7 @@ genX(init_atoms)(struct brw_context *brw) &genX(drawing_rect), &brw_indices, /* must come before brw_vertices */ - &brw_index_buffer, + &genX(index_buffer), &genX(vertices), }; #elif GEN_GEN == 7 @@ -4259,7 +4292,7 @@ genX(init_atoms)(struct brw_context *brw) &genX(drawing_rect), &brw_indices, /* must come before brw_vertices */ - &brw_index_buffer, + &genX(index_buffer), &genX(vertices), #if GEN_IS_HASWELL @@ -4354,7 +4387,7 @@ genX(init_atoms)(struct brw_context *brw) &gen8_vf_topology, &brw_indices, - &gen8_index_buffer, + &genX(index_buffer), &genX(vertices), &genX(cut_index), |