diff options
| author | Eric Anholt <[email protected]> | 2010-09-04 21:04:58 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2010-09-07 10:34:09 -0700 |
| commit | 0002069fd5117b52f0ae2be0b7e3d8e839a3a61c (patch) | |
| tree | 080f09bb497a8afbcc8fb49056cc42da65117ad7 /src/mesa | |
| parent | 3fb5377ba57aea356a81c521c0cf1975dc290b61 (diff) | |
i965: Add assertion for another requirement about types.
This catches a failure in the FS backend.
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index d715b5f838b..d067bccb3e3 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -103,6 +103,8 @@ static void brw_set_dest( struct brw_instruction *insn, guess_execution_size(insn, dest); } +extern int reg_type_size[]; + static void validate_reg(struct brw_instruction *insn, struct brw_reg reg) { @@ -112,8 +114,18 @@ validate_reg(struct brw_instruction *insn, struct brw_reg reg) int execsize_for_reg[] = {1, 2, 4, 8, 16}; int width, hstride, vstride, execsize; - if (reg.file == BRW_IMMEDIATE_VALUE) + if (reg.file == BRW_IMMEDIATE_VALUE) { + /* 3.3.6: Region Parameters. Restriction: Immediate vectors + * mean the destination has to be 128-bit aligned and the + * destination horiz stride has to be a word. + */ + if (reg.type == BRW_REGISTER_TYPE_V) { + assert(hstride_for_reg[insn->bits1.da1.dest_horiz_stride] * + reg_type_size[insn->bits1.da1.dest_reg_type] == 2); + } + return; + } if (reg.file == BRW_ARCHITECTURE_REGISTER_FILE && reg.file == BRW_ARF_NULL) |