diff options
| author | Kenneth Graunke <[email protected]> | 2017-11-03 14:52:05 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2017-11-15 09:37:32 -0800 |
| commit | ff964916dc5424495a3e884e02c3b2c8f285b78b (patch) | |
| tree | 4dd36238871ef6891324e6dfaa3914c3cda056fe /src/mesa | |
| parent | f48f52b0306e37d4d41dbf6a32970ee468298b2b (diff) | |
i965: Use nir_lower_atomics_to_ssbos and delete ABO compiler code.
We use the same hardware mechanism for both atomic counters and SSBO
atomics, so there's really no benefit to maintaining separate code to
handle each case. Instead, we can just use Rob's shiny new NIR pass to
convert atomic_uints to SSBOs, and delete piles of code.
The ssbo_start section of the binding table becomes a combined ABO and
SSBO section, with ABOs first, then SSBOs.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_link.cpp | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_program.c | 12 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 |
3 files changed, 8 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp index 24545d52ecb..d18521e792d 100644 --- a/src/mesa/drivers/dri/i965/brw_link.cpp +++ b/src/mesa/drivers/dri/i965/brw_link.cpp @@ -299,6 +299,8 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg) NIR_PASS_V(prog->nir, nir_lower_samplers, shProg); NIR_PASS_V(prog->nir, nir_lower_atomics, shProg); + NIR_PASS_V(prog->nir, nir_lower_atomics_to_ssbo, + prog->nir->info.num_abos); if (brw->ctx.Cache) { struct blob writer; diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 5ecfb9f5b11..755d4973cc0 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -732,10 +732,11 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo, stage_prog_data->binding_table.ubo_start = 0xd0d0d0d0; } - if (prog->info.num_ssbos) { + if (prog->info.num_ssbos || prog->info.num_abos) { + assert(prog->info.num_abos <= BRW_MAX_ABO); assert(prog->info.num_ssbos <= BRW_MAX_SSBO); stage_prog_data->binding_table.ssbo_start = next_binding_table_offset; - next_binding_table_offset += prog->info.num_ssbos; + next_binding_table_offset += prog->info.num_abos + prog->info.num_ssbos; } else { stage_prog_data->binding_table.ssbo_start = 0xd0d0d0d0; } @@ -759,13 +760,6 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo, stage_prog_data->binding_table.gather_texture_start = 0xd0d0d0d0; } - if (prog->info.num_abos) { - stage_prog_data->binding_table.abo_start = next_binding_table_offset; - next_binding_table_offset += prog->info.num_abos; - } else { - stage_prog_data->binding_table.abo_start = 0xd0d0d0d0; - } - if (prog->info.num_images) { stage_prog_data->binding_table.image_start = next_binding_table_offset; next_binding_table_offset += prog->info.num_images; diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index bcd82d03e7c..a4804401fc5 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -1284,7 +1284,8 @@ brw_upload_ubo_surfaces(struct brw_context *brw, struct gl_program *prog, } uint32_t *ssbo_surf_offsets = - &stage_state->surf_offset[prog_data->binding_table.ssbo_start]; + &stage_state->surf_offset[prog_data->binding_table.ssbo_start] + + prog->info.num_abos; for (int i = 0; i < prog->info.num_ssbos; i++) { struct gl_buffer_binding *binding = @@ -1351,7 +1352,7 @@ brw_upload_abo_surfaces(struct brw_context *brw, { struct gl_context *ctx = &brw->ctx; uint32_t *surf_offsets = - &stage_state->surf_offset[prog_data->binding_table.abo_start]; + &stage_state->surf_offset[prog_data->binding_table.ssbo_start]; if (prog->info.num_abos) { for (unsigned i = 0; i < prog->info.num_abos; i++) { |