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authorIago Toral Quiroga <[email protected]>2015-06-16 21:55:14 +0200
committerJason Ekstrand <[email protected]>2015-08-03 09:40:48 -0700
commite6cafb5dfdef8d8d25ee1e3375304cf35897d1f7 (patch)
tree5d6abeb5228e0af304d82bee766a9950b3796e01 /src/mesa
parente76e8caecd30799500357a45468329f033a93932 (diff)
i965/nir/vec4: Implement load_uniform intrinsic
For the indirect case we need to take the index delivered by NIR and compute the parent uniform that we are accessing (the one that we uploaded to a surface) and the constant offset into that surface. Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_nir.cpp26
1 files changed, 24 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index d9af945e2e4..ff218a50807 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -522,10 +522,32 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
}
case nir_intrinsic_load_uniform_indirect:
+ has_indirect = true;
/* fallthrough */
- case nir_intrinsic_load_uniform:
- /* @TODO: Not yet implemented */
+ case nir_intrinsic_load_uniform: {
+ int uniform = instr->const_index[0];
+
+ dest = get_nir_dest(instr->dest);
+
+ if (has_indirect) {
+ /* Split addressing into uniform and offset */
+ int offset = uniform - nir_uniform_driver_location[uniform];
+ assert(offset >= 0);
+
+ uniform -= offset;
+ assert(uniform >= 0);
+
+ src = src_reg(dst_reg(UNIFORM, uniform));
+ src.reg_offset = offset;
+ src_reg tmp = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_D, 1);
+ src.reladdr = new(mem_ctx) src_reg(tmp);
+ } else {
+ src = src_reg(dst_reg(UNIFORM, uniform));
+ }
+
+ emit(MOV(dest, src));
break;
+ }
case nir_intrinsic_atomic_counter_read:
case nir_intrinsic_atomic_counter_inc: