diff options
author | Alex Deucher <[email protected]> | 2009-07-21 01:58:05 -0400 |
---|---|---|
committer | Alex Deucher <[email protected]> | 2009-07-21 10:53:20 -0400 |
commit | 9e6d38f8a2cc89e3d45ef2bb169b72c3c41fc27b (patch) | |
tree | 7172887919d9dc236609288237c05fb95b350b99 /src/mesa | |
parent | cf24119d38360bfb25fa2683fe86a139826084f0 (diff) |
r600: add alpha test support
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/r600/r700_chip.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r600/r700_chip.h | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r600/r700_state.c | 55 |
3 files changed, 54 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c index 91aa8fc8fc6..635dd58e72c 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.c +++ b/src/mesa/drivers/dri/r600/r700_chip.c @@ -139,6 +139,7 @@ GLboolean r700InitChipObject(context_t *context) // SX LINK_STATES(SX_MISC); LINK_STATES(SX_ALPHA_TEST_CONTROL); + LINK_STATES(SX_ALPHA_REF); // VGT LINK_STATES(VGT_MAX_VTX_INDX); diff --git a/src/mesa/drivers/dri/r600/r700_chip.h b/src/mesa/drivers/dri/r600/r700_chip.h index 04af4bc3b98..fa419aa4995 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.h +++ b/src/mesa/drivers/dri/r600/r700_chip.h @@ -372,6 +372,7 @@ typedef struct _R700_CHIP_CONTEXT // SX union UINT_FLOAT SX_MISC ; /* 0xA0D4 */ union UINT_FLOAT SX_ALPHA_TEST_CONTROL ; /* 0xA104 */ + union UINT_FLOAT SX_ALPHA_REF ; /* 0xA10E */ // VGT union UINT_FLOAT VGT_MAX_VTX_INDX ; /* 0xA100 */ @@ -422,7 +423,7 @@ typedef struct _R700_CHIP_CONTEXT union UINT_FLOAT SPI_FOG_FUNC_SCALE ; /* 0xA1B8 */ union UINT_FLOAT SPI_FOG_FUNC_BIAS ; /* 0xA1B9 */ - union UINT_FLOAT SQ_VTX_SEMANTIC_0 ; /* 0xA0E0 */ + union UINT_FLOAT SQ_VTX_SEMANTIC_0 ; /* 0xA0E0 */ union UINT_FLOAT SQ_VTX_SEMANTIC_1 ; /* 0xA0E1 */ union UINT_FLOAT SQ_VTX_SEMANTIC_2 ; /* 0xA0E2 */ union UINT_FLOAT SQ_VTX_SEMANTIC_3 ; /* 0xA0E3 */ diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c index 44584430036..5fe4b36b710 100644 --- a/src/mesa/drivers/dri/r600/r700_state.c +++ b/src/mesa/drivers/dri/r600/r700_state.c @@ -305,8 +305,57 @@ static void r700SetDepthState(GLcontext * ctx) } } +static void r700SetAlphaState(GLcontext * ctx) +{ + context_t *context = R700_CONTEXT(ctx); + R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw); + uint32_t alpha_func; + GLboolean really_enabled = ctx->Color.AlphaEnabled; + + switch (ctx->Color.AlphaFunc) { + case GL_NEVER: + alpha_func = REF_NEVER; + break; + case GL_LESS: + alpha_func = REF_LESS; + break; + case GL_EQUAL: + alpha_func = REF_EQUAL; + break; + case GL_LEQUAL: + alpha_func = REF_LEQUAL; + break; + case GL_GREATER: + alpha_func = REF_GREATER; + break; + case GL_NOTEQUAL: + alpha_func = REF_NOTEQUAL; + break; + case GL_GEQUAL: + alpha_func = REF_GEQUAL; + break; + case GL_ALWAYS: + /*alpha_func = REF_ALWAYS; */ + really_enabled = GL_FALSE; + break; + } + + if (really_enabled) { + SETfield(r700->SX_ALPHA_TEST_CONTROL.u32All, alpha_func, + ALPHA_FUNC_shift, ALPHA_FUNC_mask); + SETbit(r700->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_TEST_ENABLE_bit); + r700->SX_ALPHA_REF.f32All = ctx->Color.AlphaRef; + } else { + CLEARbit(r700->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_TEST_ENABLE_bit); + } + +} + static void r700AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref) //--------------- { + (void)func; + (void)ref; + r700SetAlphaState(ctx); } @@ -628,7 +677,7 @@ static void r700Enable(GLcontext * ctx, GLenum cap, GLboolean state) //--------- /* empty */ break; case GL_ALPHA_TEST: - //r700SetAlphaState(ctx); + r700SetAlphaState(ctx); break; case GL_COLOR_LOGIC_OP: r700SetLogicOpState(ctx); @@ -1327,9 +1376,7 @@ void r700InitState(GLcontext * ctx) //------------------- /* Specify the number of instances */ r700->VGT_DMA_NUM_INSTANCES.u32All = 1; - /* not alpha blend */ - CLEARfield(r700->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_FUNC_mask); - CLEARbit(r700->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_TEST_ENABLE_bit); + r700AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef); /* default shader connections. */ r700->SPI_VS_OUT_ID_0.u32All = 0x03020100; |