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authorMatt Turner <[email protected]>2016-02-14 23:23:53 -0800
committerMatt Turner <[email protected]>2016-03-30 19:54:29 -0700
commit65bc94022b0fd31d01c8de65f7f1115a86baa65a (patch)
treec710e5fcb9bc67ff415b97ced5d31fddb726830b /src/mesa
parent10b189f985755496a179b663d4b0746f3717093b (diff)
i965: Remove incorrect cycle estimates.
These printed the cycle count the last basic block (sched.time is set per basic block!). We have accurate, full program, data printed elsewhere. Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 5b54b51395c..51d9ce1a5d2 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -1674,11 +1674,6 @@ fs_visitor::schedule_instructions(instruction_scheduler_mode mode)
cfg->num_blocks, mode);
sched.run(cfg);
- if (unlikely(debug_enabled) && mode == SCHEDULE_POST) {
- fprintf(stderr, "%s%d estimated execution time: %d cycles\n",
- stage_abbrev, dispatch_width, sched.time);
- }
-
invalidate_live_intervals();
}
@@ -1688,10 +1683,5 @@ vec4_visitor::opt_schedule_instructions()
vec4_instruction_scheduler sched(this, prog_data->total_grf);
sched.run(cfg);
- if (unlikely(debug_enabled)) {
- fprintf(stderr, "%s estimated execution time: %d cycles\n",
- stage_abbrev, sched.time);
- }
-
invalidate_live_intervals();
}