diff options
| author | Paul Berry <[email protected]> | 2011-08-25 08:06:31 -0700 |
|---|---|---|
| committer | Paul Berry <[email protected]> | 2011-09-06 11:05:14 -0700 |
| commit | 2bc421845e7d334bc5a91b62d834b8f77e769570 (patch) | |
| tree | 4d044d50dc9ff9ce714b52eae64dbb08ffbe0d40 /src/mesa | |
| parent | 62b0c8561e2d259e4dc1f27346bf2f36c3b098c8 (diff) | |
i965: clip: Modify brw_clip_tri_alloc_regs() to use the VUE map.
Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip_tri.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c index 0f938fe0b6f..d0638748d71 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_tri.c +++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c @@ -74,9 +74,12 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c, i += c->nr_regs; } - if (c->nr_attrs & 1) { + if (c->vue_map.num_slots % 2) { + /* The VUE has an odd number of slots so the last register is only half + * used. Fill the second half with zero. + */ for (j = 0; j < 3; j++) { - GLuint delta = c->offset[c->idx_to_attr[c->nr_attrs - 1]] + ATTR_SIZE; + GLuint delta = c->vue_map.num_slots * ATTR_SIZE; brw_MOV(&c->func, byte_offset(c->reg.vertex[j], delta), brw_imm_f(0)); } |