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authorAnuj Phogat <[email protected]>2018-02-06 16:47:04 -0800
committerAnuj Phogat <[email protected]>2018-02-15 16:14:56 -0800
commit9c144dc81e11658c868867052d14d60cca55a641 (patch)
tree941ac0a3e5cdf018f88a3fcdd5c473157ed81ab8 /src/mesa
parent02e91b6d62b121d7bd8574d708ea3aa826eaadab (diff)
i965/icl: Add assertions to check dispatch mode is SIMD8
SIMD4x2 dispatch mode has been removed in GEN11. We're not using it anyways in Mesa. Adding few asserts to make it explicit. Use GEN_GEN macro in place of devinfo->gen (Ken) Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/genX_state_upload.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index b171c4f171c..8668abd591f 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -2050,6 +2050,8 @@ genX(upload_vs_state)(struct brw_context *brw)
assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ||
vue_prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT);
+ assert(GEN_GEN < 11 ||
+ vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8);
#if GEN_GEN == 6
/* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State,
@@ -3967,6 +3969,9 @@ genX(upload_ds_state)(struct brw_context *brw)
if (!tes_prog_data) {
brw_batch_emit(brw, GENX(3DSTATE_DS), ds);
} else {
+ assert(GEN_GEN < 11 ||
+ vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8);
+
brw_batch_emit(brw, GENX(3DSTATE_DS), ds) {
INIT_THREAD_DISPATCH_FIELDS(ds, Patch);