summaryrefslogtreecommitdiffstats
path: root/src/mesa
diff options
context:
space:
mode:
authorKenneth Graunke <[email protected]>2018-01-20 01:28:07 -0800
committerKenneth Graunke <[email protected]>2018-01-20 01:31:25 -0800
commit60d8fe9216d68aff1b00fdc8bc2e066ea45aac1e (patch)
tree840cb7fe465b12bf84b7bfba982baf1d246bae62 /src/mesa
parent436ed65d38d4ed8b2a7b40fb2adeb15fb0d3989f (diff)
i965: Delete completely bogus comment
This hasn't been true in 6+ years, if it was even true then. Before we rewrote the compiler and introduced GLSL IR in 2010-2011, i965 used to have two compiler backends for WM programs, based on Mesa IR. One handled flow control and was SIMD8-only, while the other was SIMD16 only and didn't handle flow control. Or something like that. Even then, this certainly didn't handle vertex shaders, so "all ... code generation" is a bit strong.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 08bacebd571..942fb04a804 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -126,11 +126,6 @@ brw_wm_debug_recompile(struct brw_context *brw, struct gl_program *prog,
}
}
-/**
- * All Mesa program -> GPU code generation goes through this function.
- * Depending on the instructions used (i.e. flow control instructions)
- * we'll use one of two code generators.
- */
static bool
brw_codegen_wm_prog(struct brw_context *brw,
struct brw_program *fp,