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authorAnuj Phogat <[email protected]>2015-06-04 16:57:02 -0700
committerAnuj Phogat <[email protected]>2015-06-29 12:23:17 -0700
commit06f76b7fa68db1ac74ecca015412f71b3a5e9f9c (patch)
treeb3f11aa149f3cccd5b2480ee14ba54374914ddce /src/mesa
parente566e5203aaba98109a67766cf28991de3358490 (diff)
i965: Make a helper function intel_miptree_set_alignment()
Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_tex_layout.c21
1 files changed, 14 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 455984309fa..e35cb645c24 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -761,16 +761,13 @@ intel_miptree_set_total_width_height(struct brw_context *brw,
mt->total_width, mt->total_height, mt->cpp);
}
-void
-brw_miptree_layout(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- enum intel_miptree_tiling_mode requested,
- uint32_t layout_flags)
+static void
+intel_miptree_set_alignment(struct brw_context *brw,
+ struct intel_mipmap_tree *mt,
+ uint32_t layout_flags)
{
bool gen6_hiz_or_stencil = false;
- mt->tr_mode = INTEL_MIPTREE_TRMODE_NONE;
-
if (brw->gen == 6 && mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
const GLenum base_format = _mesa_get_format_base_format(mt->format);
gen6_hiz_or_stencil = _mesa_is_depth_or_stencil_format(base_format);
@@ -805,7 +802,17 @@ brw_miptree_layout(struct brw_context *brw,
intel_horizontal_texture_alignment_unit(brw, mt, layout_flags);
mt->align_h = intel_vertical_texture_alignment_unit(brw, mt);
}
+}
+
+void
+brw_miptree_layout(struct brw_context *brw,
+ struct intel_mipmap_tree *mt,
+ enum intel_miptree_tiling_mode requested,
+ uint32_t layout_flags)
+{
+ mt->tr_mode = INTEL_MIPTREE_TRMODE_NONE;
+ intel_miptree_set_alignment(brw, mt, layout_flags);
intel_miptree_set_total_width_height(brw, mt);
if (!mt->total_width || !mt->total_height) {