diff options
| author | Nanley Chery <[email protected]> | 2018-06-11 08:15:17 -0700 |
|---|---|---|
| committer | Nanley Chery <[email protected]> | 2018-07-13 08:31:21 -0700 |
| commit | 03cbaae03e0036782a4007026cbee79e7bc2a4b2 (patch) | |
| tree | a6ead2bbd0357969cd5c7821fdb2161536429a78 /src/mesa | |
| parent | 32b22592a883b527c7207818e209300542b15edc (diff) | |
i965/miptree: Add and use mt_surf_usage
v2: Make mt_fmt const (Topi).
Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 38 |
1 files changed, 25 insertions, 13 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 5ec95d2cb5d..b0ca75d3c56 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -673,6 +673,23 @@ make_separate_stencil_surface(struct brw_context *brw, return true; } +/* Return the usual surface usage flags for the given format. */ +static isl_surf_usage_flags_t +mt_surf_usage(mesa_format format) +{ + switch(_mesa_get_format_base_format(format)) { + case GL_DEPTH_COMPONENT: + return ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_TEXTURE_BIT; + case GL_DEPTH_STENCIL: + return ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_STENCIL_BIT | + ISL_SURF_USAGE_TEXTURE_BIT; + case GL_STENCIL_INDEX: + return ISL_SURF_USAGE_STENCIL_BIT | ISL_SURF_USAGE_TEXTURE_BIT; + default: + return ISL_SURF_USAGE_RENDER_TARGET_BIT | ISL_SURF_USAGE_TEXTURE_BIT; + } +} + static struct intel_mipmap_tree * miptree_create(struct brw_context *brw, GLenum target, @@ -709,8 +726,7 @@ miptree_create(struct brw_context *brw, return make_surface(brw, target, mt_fmt, first_level, last_level, width0, height0, depth0, num_samples, tiling_flags, - ISL_SURF_USAGE_STENCIL_BIT | - ISL_SURF_USAGE_TEXTURE_BIT, + mt_surf_usage(mt_fmt), alloc_flags, 0, NULL); @@ -722,7 +738,7 @@ miptree_create(struct brw_context *brw, brw, target, mt_fmt, first_level, last_level, width0, height0, depth0, num_samples, tiling_flags, - ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_TEXTURE_BIT, + mt_surf_usage(mt_fmt), alloc_flags, 0, NULL); if (needs_separate_stencil(brw, mt, format) && @@ -742,8 +758,7 @@ miptree_create(struct brw_context *brw, first_level, last_level, width0, height0, depth0, num_samples, tiling_flags, - ISL_SURF_USAGE_RENDER_TARGET_BIT | - ISL_SURF_USAGE_TEXTURE_BIT, + mt_surf_usage(mt_fmt), alloc_flags, 0, NULL); if (!mt) return NULL; @@ -812,12 +827,11 @@ intel_miptree_create_for_bo(struct brw_context *brw, if ((base_format == GL_DEPTH_COMPONENT || base_format == GL_DEPTH_STENCIL)) { - const mesa_format depth_only_format = + const mesa_format mt_fmt = (devinfo->gen < 6) ? format : intel_depth_format_for_depthstencil_format(format); - mt = make_surface(brw, target, - devinfo->gen >= 6 ? depth_only_format : format, + mt = make_surface(brw, target, mt_fmt, 0, 0, width, height, depth, 1, ISL_TILING_Y0_BIT, - ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_TEXTURE_BIT, + mt_surf_usage(mt_fmt), 0, pitch, bo); if (!mt) return NULL; @@ -832,8 +846,7 @@ intel_miptree_create_for_bo(struct brw_context *brw, mt = make_surface(brw, target, MESA_FORMAT_S_UINT8, 0, 0, width, height, depth, 1, ISL_TILING_W_BIT, - ISL_SURF_USAGE_STENCIL_BIT | - ISL_SURF_USAGE_TEXTURE_BIT, + mt_surf_usage(MESA_FORMAT_S_UINT8), 0, pitch, bo); if (!mt) return NULL; @@ -858,8 +871,7 @@ intel_miptree_create_for_bo(struct brw_context *brw, mt = make_surface(brw, target, format, 0, 0, width, height, depth, 1, 1lu << tiling, - ISL_SURF_USAGE_RENDER_TARGET_BIT | - ISL_SURF_USAGE_TEXTURE_BIT, + mt_surf_usage(format), 0, pitch, bo); if (!mt) return NULL; |