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authorJason Ekstrand <[email protected]>2016-02-06 09:05:10 -0800
committerJason Ekstrand <[email protected]>2016-02-09 15:00:17 -0800
commitee85014b90af1d94d637ec763a803479e9bac5dc (patch)
tree91a7aea9be51e8c18b18f40f237175e9471e0d41 /src/mesa
parent3f421849945d763b3e477ceb1c726c2dbed3bafd (diff)
nir/tex_instr: Rename sampler to texture
We're about to separate the two concepts. When we do, the sampler will become optional. Doing a rename first makes the separation a bit more safe because drivers that depend on GLSL or TGSI behaviour will be fine to just use the texture index all the time. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_nir.cpp24
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_nir.cpp24
-rw-r--r--src/mesa/program/prog_to_nir.c2
3 files changed, 25 insertions, 25 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 0efb2fa9aa3..ecca3ef7183 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -2940,8 +2940,8 @@ fs_visitor::nir_emit_shared_atomic(const fs_builder &bld,
void
fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
{
- unsigned sampler = instr->sampler_index;
- fs_reg sampler_reg(brw_imm_ud(sampler));
+ unsigned texture = instr->texture_index;
+ fs_reg texture_reg(brw_imm_ud(texture));
int gather_component = instr->component;
@@ -3007,9 +3007,9 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
case nir_tex_src_projector:
unreachable("should be lowered");
- case nir_tex_src_sampler_offset: {
- /* Figure out the highest possible sampler index and mark it as used */
- uint32_t max_used = sampler + instr->sampler_array_size - 1;
+ case nir_tex_src_texture_offset: {
+ /* Figure out the highest possible texture index and mark it as used */
+ uint32_t max_used = texture + instr->texture_array_size - 1;
if (instr->op == nir_texop_tg4 && devinfo->gen < 8) {
max_used += stage_prog_data->binding_table.gather_texture_start;
} else {
@@ -3018,9 +3018,9 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
brw_mark_surface_used(prog_data, max_used);
/* Emit code to evaluate the actual indexing expression */
- sampler_reg = vgrf(glsl_type::uint_type);
- bld.ADD(sampler_reg, src, brw_imm_ud(sampler));
- sampler_reg = bld.emit_uniformize(sampler_reg);
+ texture_reg = vgrf(glsl_type::uint_type);
+ bld.ADD(texture_reg, src, brw_imm_ud(texture));
+ texture_reg = bld.emit_uniformize(texture_reg);
break;
}
@@ -3032,8 +3032,8 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
if (instr->op == nir_texop_txf_ms ||
instr->op == nir_texop_samples_identical) {
if (devinfo->gen >= 7 &&
- key_tex->compressed_multisample_layout_mask & (1 << sampler)) {
- mcs = emit_mcs_fetch(coordinate, instr->coord_components, sampler_reg);
+ key_tex->compressed_multisample_layout_mask & (1 << texture)) {
+ mcs = emit_mcs_fetch(coordinate, instr->coord_components, texture_reg);
} else {
mcs = brw_imm_ud(0u);
}
@@ -3070,7 +3070,7 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
fs_reg dst = retype(get_nir_dest(instr->dest), BRW_REGISTER_TYPE_D);
fs_inst *inst = bld.emit(SHADER_OPCODE_SAMPLEINFO, dst,
bld.vgrf(BRW_REGISTER_TYPE_D, 1),
- sampler_reg);
+ texture_reg);
inst->mlen = 1;
inst->header_size = 1;
inst->base_mrf = -1;
@@ -3084,7 +3084,7 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
emit_texture(op, dest_type, coordinate, instr->coord_components,
shadow_comparitor, lod, lod2, lod_components, sample_index,
tex_offset, mcs, gather_component,
- is_cube_array, sampler, sampler_reg);
+ is_cube_array, texture, texture_reg);
fs_reg dest = get_nir_dest(instr->dest);
dest.type = this->result.type;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index d3ac7ab61f7..40a7530d940 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -1639,8 +1639,8 @@ glsl_type_for_nir_alu_type(nir_alu_type alu_type,
void
vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
{
- unsigned sampler = instr->sampler_index;
- src_reg sampler_reg = brw_imm_ud(sampler);
+ unsigned texture = instr->texture_index;
+ src_reg texture_reg = brw_imm_ud(texture);
src_reg coordinate;
const glsl_type *coord_type = NULL;
src_reg shadow_comparitor;
@@ -1715,13 +1715,13 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
offset_value = get_nir_src(instr->src[i].src, BRW_REGISTER_TYPE_D, 2);
break;
- case nir_tex_src_sampler_offset: {
- /* The highest sampler which may be used by this operation is
+ case nir_tex_src_texture_offset: {
+ /* The highest texture which may be used by this operation is
* the last element of the array. Mark it here, because the generator
* doesn't have enough information to determine the bound.
*/
- uint32_t array_size = instr->sampler_array_size;
- uint32_t max_used = sampler + array_size - 1;
+ uint32_t array_size = instr->texture_array_size;
+ uint32_t max_used = texture + array_size - 1;
if (instr->op == nir_texop_tg4) {
max_used += prog_data->base.binding_table.gather_texture_start;
} else {
@@ -1733,8 +1733,8 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
/* Emit code to evaluate the actual indexing expression */
src_reg src = get_nir_src(instr->src[i].src, 1);
src_reg temp(this, glsl_type::uint_type);
- emit(ADD(dst_reg(temp), src, brw_imm_ud(sampler)));
- sampler_reg = emit_uniformize(temp);
+ emit(ADD(dst_reg(temp), src, brw_imm_ud(texture)));
+ texture_reg = emit_uniformize(temp);
break;
}
@@ -1753,8 +1753,8 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
instr->op == nir_texop_samples_identical) {
assert(coord_type != NULL);
if (devinfo->gen >= 7 &&
- key_tex->compressed_multisample_layout_mask & (1 << sampler)) {
- mcs = emit_mcs_fetch(coord_type, coordinate, sampler_reg);
+ key_tex->compressed_multisample_layout_mask & (1 << texture)) {
+ mcs = emit_mcs_fetch(coord_type, coordinate, texture_reg);
} else {
mcs = brw_imm_ud(0u);
}
@@ -1771,7 +1771,7 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
/* Stuff the channel select bits in the top of the texture offset */
if (instr->op == nir_texop_tg4) {
if (instr->component == 1 &&
- (key_tex->gather_channel_quirk_mask & (1 << sampler))) {
+ (key_tex->gather_channel_quirk_mask & (1 << texture))) {
/* gather4 sampler is broken for green channel on RG32F --
* we must ask for blue instead.
*/
@@ -1792,7 +1792,7 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
shadow_comparitor,
lod, lod2, sample_index,
constant_offset, offset_value,
- mcs, is_cube_array, sampler, sampler_reg);
+ mcs, is_cube_array, texture, texture_reg);
}
void
diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c
index 29e5d3075c9..93a167e0aa1 100644
--- a/src/mesa/program/prog_to_nir.c
+++ b/src/mesa/program/prog_to_nir.c
@@ -609,7 +609,7 @@ ptn_tex(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src,
instr->op = op;
instr->dest_type = nir_type_float;
instr->is_shadow = prog_inst->TexShadow;
- instr->sampler_index = prog_inst->TexSrcUnit;
+ instr->texture_index = prog_inst->TexSrcUnit;
switch (prog_inst->TexSrcTarget) {
case TEXTURE_1D_INDEX: