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authorEric Anholt <[email protected]>2012-11-26 13:39:11 -0800
committerEric Anholt <[email protected]>2012-11-29 22:34:28 -0800
commit2f7915bdb9e1f12861cddbb97f8101693565a59e (patch)
tree10933aa1c3e104cb0b23dada5aeb937245d46137 /src/mesa
parentf126f34c1d1726336586da7f5a726546963a0f0a (diff)
i965/fp: Fix segfault on gen4 TXB instructions.
The gen4 simd16 workaround looks at ir->type to determine how much storage to allocate for the simd16 value. In fragment programs, texturing only ever returns float vec4s (unlike GLSL, which can also have scalar floats or vector integers), so this is the right type. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56962 Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_fp.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index bb8cd9a79a8..4be7779edf9 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
@@ -441,6 +441,8 @@ fs_visitor::emit_fragment_program_code()
break;
}
+ ir->type = glsl_type::vec4_type;
+
const glsl_type *coordinate_type;
switch (fpi->TexSrcTarget) {
case TEXTURE_1D_INDEX: