diff options
| author | Eric Anholt <[email protected]> | 2012-11-14 11:44:57 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2012-11-25 20:22:02 -0800 |
| commit | 97747ac88fe9207dde83b275a93ebcee3a84dc01 (patch) | |
| tree | c3fcbfd99349fcbf356a7fa3ea56c458b0eee452 /src/mesa | |
| parent | 59bfd66a614177320817a97e1dadfcfcf3b9b092 (diff) | |
i965: Fix hangs with FP KIL instructions pre-gen6.
We can't support IF statements in 16-wide on these. To get back to 16-wide
for these shaders, we need to support predicate on discard instructions in the
backend IR, which is something we've sort of got on the list to do anyway.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55828
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp index 88b09761b88..834f290a315 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp @@ -255,6 +255,8 @@ fs_visitor::emit_fragment_program_code() emit(CMP(null, regoffset(src[0], i), fs_reg(0.0f), BRW_CONDITIONAL_L)); + if (intel->gen < 6 && c->dispatch_width == 16) + fail("Can't support (non-uniform) control flow on 16-wide"); emit(IF(BRW_PREDICATE_NORMAL)); emit(FS_OPCODE_DISCARD); emit(BRW_OPCODE_ENDIF); |